SNVA967C June   2020  – April 2021 LM34966-Q1 , LM5156 , LM5156-Q1 , LM51561 , LM51561-Q1 , LM51561H , LM51561H-Q1 , LM5156H , LM5156H-Q1

 

  1. 1Overview
  2. 2Functional Safety Failure In Time (FIT) Rates
  3. 3Functional Safety Failure In Time (FIT) Rates
  4. 4Failure Mode Distribution (FMD)
  5. 5Pin Failure Mode Analysis (Pin FMA)
  6. 6Pin Failure Mode Analysis (Pin FMA) – HTSSOP
  7. 7Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the LM5156, LM5156-Q1, LM51561, LM51561-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to Ground (see Table 5-2)
  • Pin open-circuited (see Table 5-3)
  • Pin short-circuited to an adjacent pin (see Table 5-4)
  • Pin short-circuited to BIAS supply (see Table 5-5)

Table 5-2 through Table 5-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 5-1.

Table 5-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality
BNo device damage, but loss of functionality
CNo device damage, but performance degradation
DNo device damage, no impact to functionality or performance

Figure 5-1 shows the LM5156, LM5156-Q1, LM51561, LM51561-Q1 (package of WSON) pin diagram. For a detailed description of the device pins please refer to the 'Pin Configuration and Functions' section in the LM5156, LM5156-Q1, LM51561, LM51561-Q1 data sheet.

GUID-20210416-CA0I-DNDV-JP93-GTQRBSFWTZPG-low.gif Figure 5-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • Device used within the Recommended Operating Conditions and the Absolute Maximum Ratings found in the LM5156, LM5156-Q1, LM51561, LM51561-Q1 data sheet.
  • Configuration as boost converter as shown in the Application and Implementation section found in the LM5156, LM5156-Q1, LM51561, LM51561-Q1 data sheet.

Table 5-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
BIAS 1 Device unpowered. Device not functional B
VCC 2 VCC regulator short circuit. Device shuts down due to VCC undervoltage. VCC regulator may be disabled if thermal shutdown is triggered. B
GATE 3 Gate driver is not functional. In boost operation, the output voltage is out of regulation. Output voltage is equal to input voltage minus diode forward voltage drop. Potential damage to pin A
GND 4 No effect. Normal operation D
CS 5 Loss of current sense information and loss of current limit. Loop is unstable and potential inductor saturation. B
COMP 6 Device out of regulation. Device is not switching. B
DITHOFF 7 Spread Spectrum enabled B/D
FB 8 Output voltage rises uncontrolled. Potential damage to BIAS pin, if BIAS is connected to VOUT. A
SS 9 During soft start, SS pin stuck low. The device does not start up. The device stops switching during operation. B
RT 10 Switching frequency increased to > 2.2 MHz. Device may be unstable. B
PGOOD 11 Correct output voltage. Loss of power good functionality B
UVLO/SYNC/EN 12 EN stuck low. Device is disabled and in shut down mode. B
Table 5-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
BIAS1Device unpowered. Device is not functional.B
VCC2High ripple on the VCC pin that may trigger VCC UVLO.B
GATE3Possible device damageA
GND 4 Possible device damage A
CS 5 Loss of current sense information and loss of current limit. Loop is unstable and potential inductor saturation. B
COMP 6 Device is unstable. C
DITHOFF 7 Spread spectrum function in an undefined state B
FB 8 Output voltage rises uncontrolled. Potential damage to the BIAS pin if BIAS is connected to VOUT. A
SS 9 During soft start, SS pin pulled high. The device soft start time reduced to 0. High inrush current possible.
No effect during operation.
C
RT 10 Internal oscillator not functional. Device stops switching operation. B
PGOOD 11 Correct output voltage. Loss of power-good functionality C
UVLO/SYNC/EN 12 State of EN/UVLO/SYNC undetermined. Device may be in shut down or standby mode or enabled. B
Table 5-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of Potential Failure Effect(s) Failure Effect Class
BIAS 1 VCC Potential device damage, if BIAS voltage is greater 18 V.

Normal operation, if BIAS voltage is below 18 V.

A/D
VCC 2 GATE Gate driver not functional. Output voltage is out of regulation. Potential damage to pin A
GATE 3 GND Gate driver not functional. Output voltage is out of regulation. In boost operation, the output voltage is equal to input voltage minus diode forward voltage drop. Potential damage to pin A
GND 4 CS See Table 5-2. B
CS 5 COMP Potential damage to part. Absolute maximum voltage for this pin is 0.3 V. A
COMP 6 DITHOFF Not considered. Corner pin D
DITHOFF 7 FB Spread spectrum functionality undeterminded. Output voltage may be out of regulation. B
FB 8 SS COMP pin voltage clamped to 1 V. Device is not switching and out of regulation. B
SS 9 RT Output voltage regulates to VOUT/2. Switching frequency may be incorrect. B
RT 10 PGOOD If FB < 0.9 V (falling) and PGOOD is active low, the switching frequency increased to > 2.2 MHz. Device may be unstable.
If FB > 0.95 V (rising) and PGOOD is pulled up externally, the internal oscillator stops. Potential device damage if pull up voltage is > 3.8 V.
A
PGOOD 11 UVLO/SYNC/EN Potential damage to device, if pin 12 is directly connected to supply. A
UVLO/SYNC/EN 12 BIAS Not considered. Corner pin D
Table 5-5 Pin FMA for Device Pins Short-Circuited to BIAS supply
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
BIAS1No effect. Normal operationD
VCC2Potential device damage if BIAS voltage is greater 18 V.
Normal operation if BIAS voltage is below 18 V.
A/D
GATE3External MOSFET is turned on constantly. Potential damage of external componentA
GND 4 Device is unpowered. Device is not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. A
CS 5 Potential device damage. Absolute maximum rating for this pin is 0.3 V. A
COMP 6 Potential device damage if current into pin exceeds 1.6 mA A
DITHOFF 7 Potential device damage if BIAS voltage is greater 18 V A
FB 8 Potential device damage if BIAS voltage is greater 4.0 V A
SS 9 Potential device damage if BIAS voltage is greater 3.8 V A
RT 10 Potential device damage if BIAS voltage is greater 3.8 V A
PGOOD 11 Potential device damage if BIAS voltage is greater 18 V or current into pin exceeds 1 mA A
UVLO/SYNC/EN 12 No effect. Normal operation D