SNOSD81B September   2018  – January 2020

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Block Diagram
      2.      Switching Performance at >100 V/ns
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Switching Parameters
      1. 7.1.1 Turn-on Delays
      2. 7.1.2 Turn-off Delays
      3. 7.1.3 Drain Slew Rate
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Direct-Drive GaN Architecture
      2. 8.3.2 Internal Buck-Boost DC-DC Converter
      3. 8.3.3 Internal Auxiliary LDO
      4. 8.3.4 Start Up Sequence
      5. 8.3.5 R-C Decoupling for IN pin
      6. 8.3.6 Low Power Mode
      7. 8.3.7 Fault Detection
        1. 8.3.7.1 Over-current Protection
        2. 8.3.7.2 Over-Temperature Protection and UVLO
      8. 8.3.8 Drive Strength Adjustment
    4. 8.4 Safe Operation Area (SOA)
      1. 8.4.1 Repetitive SOA
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Slew Rate Selection
          1. 9.2.2.1.1 Startup and Slew Rate with Bootstrap High-Side Supply
        2. 9.2.2.2 Signal Level-Shifting
        3. 9.2.2.3 Buck-Boost Converter Design
    3. 9.3 Do's and Don'ts
  10. 10Power Supply Recommendations
    1. 10.1 Using an Isolated Power Supply
    2. 10.2 Using a Bootstrap Diode
      1. 10.2.1 Diode Selection
      2. 10.2.2 Managing the Bootstrap Voltage
      3. 10.2.3 Reliable Bootstrap Start-up
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Power Loop Inductance
      2. 11.1.2 Signal Ground Connection
      3. 11.1.3 Bypass Capacitors
      4. 11.1.4 Switch-Node Capacitance
      5. 11.1.5 Signal Integrity
      6. 11.1.6 High-Voltage Spacing
      7. 11.1.7 Thermal Recommendations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Startup and Slew Rate with Bootstrap High-Side Supply

Using a bootstrap supply for the high-side LMG341xR050 places additional constraints on the startup of the circuit. Before the high-side LMG341xR050 functions correctly, its VDD, LDO5V, and VNEG power supplies must start up and be functional. Prior to the device powering up, the GaN device operates in cascode mode with reduced performance. In particular, under high drain slew rate (dv/dt), the transistor can conduct to a small extent and cause additional power dissipation. The correct startup procedure for a bootstrap-supplied half-bridge depends on the circuit used.

In a buck converter without pre-bias, where the initial output voltage is zero, the startup procedure is straightforward. In this case, before switching begins, turn on the low-side device to allow the high-side bootstrap transistor to charge up. When the FAULT signal goes high, the high-side device has powered up completely, and normal switching can begin.

In a boost converter or a buck converter with a pre-biased output, it is necessary to operate the circuit in switching PWM mode while the high-side LMG341xR050 is powering up. With a boost converter, if the low-side device is held on, the power inductor current will likely run away and the inductor will saturate. To start up a boost converter, the duty cycle has to be very low and gradually increase to charge the output to the desired value without the inductor current reaching saturation. This pulse sequence can be performed open-loop or using a current-mode controller. This startup mode is standard for boost-type converters.

However, with the LMG341xR050, during the boost converter startup, significant shoot-through current can occur for high drain slew rates while starting up. This shoot-through current is approximately 1.25 µC per switching event at 50 V/ns, and is comparable to a reverse-recovery event in a silicon MOSFET. If this shoot-through current is undesirable, the drain slew rate of the low-side device must be reduced during startup. In Figure 21, the FAULT output from the high-side device is used to gate MOSFET Q1. When FAULT from the high-side is high, once the device is powered up, Q1 turns on and reduces the effective resistance connected to RDRV on the low-side LMG341xR050. With this circuit, the dv/dt of the low-side device can be held low to reduce power dissipation and reduce ringing during high-side startup, but then increase to reduce switching loss during normal operation.