SNAS407H August   2007  – April 2015 DAC128S085

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 AC and Timing Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DAC Architecture
      2. 8.3.2 Output Amplifiers
      3. 8.3.3 Reference Voltage
      4. 8.3.4 Serial Interface
      5. 8.3.5 Daisy-Chain Operation
      6. 8.3.6 DAC Input Data Update Mechanism
      7. 8.3.7 Power-On Reset
      8. 8.3.8 Transfer Characteristic
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Modes
    5. 8.5 Programming
      1. 8.5.1 Programming the DAC128S085
        1. 8.5.1.1 Updating DAC Outputs Simultaneously
        2. 8.5.1.2 Updating DAC Outputs Independently
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Using References as Power Supplies
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Specification Definitions
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

12 Device and Documentation Support

12.1 Device Support

12.1.1 Specification Definitions

    DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1 LSB, which is VREF / 4096 = VA / 4096.
    DAC-to-DAC CROSSTALK is the glitch impulse transferred to a DAC output in response to a full-scale change in the output of another DAC.
    DIGITAL CROSSTALK is the glitch impulse transferred to a DAC output at mid-scale in response to a full-scale change in the input register of another DAC.
    DIGITAL FEEDTHROUGH is a measure of the energy injected into the analog output of the DAC from the digital inputs when the DAC outputs are not updated. It is measured with a full-scale code change on the data bus.
    FULL-SCALE ERROR is the difference between the actual output voltage with a full scale code (FFFh) loaded into the DAC and the value of VA x 4095 / 4096.
    GAIN ERROR is the deviation from the ideal slope of the transfer function. It can be calculated from Zero and Full-Scale Errors as GE = FSE - ZE, where GE is Gain error, FSE is Full-Scale Error and ZE is Zero Error.
    GLITCH IMPULSE is the energy injected into the analog output when the input code to the DAC register changes. It is specified as the area of the glitch in nanovolt-seconds.
    INTEGRAL NON-LINEARITY (INL) is a measure of the deviation of each individual code from a straight line through the input to output transfer function. The deviation of any given code from this straight line is measured from the center of that code value. The end point method is used. INL for this product is specified over a limited range, per the Electrical Tables.
    LEAST SIGNIFICANT BIT (LSB)is the bit that has the smallest value or weight of all bits in a word. This value is
    Equation 3. LSB = VREF / 2n

    where

    • VREF is the supply voltage for this product, and n is the DAC resolution in bits, which is 12 for the DAC128S085.
    MAXIMUM LOAD CAPACITANCE is the maximum capacitance that can be driven by the DAC with output stability maintained.
    MONOTONICITY is the condition of being monotonic, where the DAC has an output that never decreases when the input code increases.
    MOST SIGNIFICANT BIT (MSB) is the bit that has the largest value or weight of all bits in a word. Its value is 1/2 of VA.
    MULTIPLYING BANDWIDTH is the frequency at which the output amplitude falls 3 dB below the input sine wave on VREF1,2 with the DAC code at full-scale.
    NOISE SPECTRAL DENSITYis the internally generated random noise. It is measured by loading the DAC to mid-scale and measuring the noise at the output.
    POWER EFFICIENCY is the ratio of the output current to the total supply current. The output current comes from the power supply. The difference between the supply and output currents is the power consumed by the device without a load.
    SETTLING TIME is the time for the output to settle to within 1/2 LSB of the final value after the input code is updated.
    TOTAL HARMONIC DISTORTION PLUS NOISE (THD+N) is the ratio of the harmonics plus the noise present at the output of the DACs to the rms level of an ideal sine wave applied to VREF1,2 with the DAC code at mid-scale.
    WAKE-UP TIME is the time for the output to exit power-down mode. This is the time from the rising edge of SYNC to when the output voltage deviates from the power-down voltage of 0 V.
    ZERO CODE ERRORis the output error, or voltage, present at the DAC output after a code of 000h has been entered.

12.2 Documentation Support

12.2.1 Related Documentation

  • LM4132 SOT-23 Precision Low Dropout Voltage Reference, SNVS372

12.3 Trademarks

SPI is a trademark of Motorola, Inc..

All other trademarks are the property of their respective owners.

12.4 Electrostatic Discharge Caution

esds-image

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

12.5 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.