SLVUCM3A
July 2023 – June 2026
AM62A1-Q1
,
AM62A3
,
AM62A3-Q1
,
AM62A7
,
AM62A7-Q1
,
TPS6593-Q1
1
Description
Resources
Features
Applications
1
System Description
2
Device Versions
3
Processor Connections
3.1
Power Mapping
3.1.1
Supporting 0.85V on VDD_CORE
3.1.2
Using 5V Input Supply
3.2
Control Mapping
4
Supporting Functional Safety ASIL-B Requirements
4.1
Additional Safety Features
5
Static NVM Settings
5.1
Application-Based Configuration Settings
5.2
Device Identification Settings
5.3
BUCK Settings
5.4
LDO Settings
5.5
VCCA Settings
5.6
GPIO Settings
5.7
Finite State Machine (FSM) Settings
5.8
Interrupt Settings
5.9
POWERGOOD Settings
5.10
Miscellaneous Settings
5.11
Interface Settings
5.12
Watchdog Settings
6
Pre-Configurable Finite State Machine (PFSM) Settings
6.1
Configured States
6.2
PFSM Triggers
6.3
Power Sequences
6.3.1
Sequence: immediateOff2Safe_pd
6.3.2
Sequence: orderlyOff2safe
6.3.3
Sequence: warmReset
6.3.4
Sequence: any2active
6.3.5
Sequence: any2_s2r
7
Application Examples
7.1
Entering and Exiting S2R (Suspend to RAM)
7.2
Entering and Exiting Standby
7.3
Entering and Existing LP_STANDBY
8
Design and Documentation Support
8.1
Documentation Support
8.2
Support Resources
8.3
Trademarks
9
Revision History
6.3
Power Sequences