SLVS391C October   2001  – September 2015 TPS60500 , TPS60501 , TPS60502 , TPS60503

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Short-Circuit Current Limit and Thermal Protection
      2. 8.3.2 Enable
      3. 8.3.3 Power Good Detector
    4. 8.4 Device Functional Modes
      1. 8.4.1 Start-up Procedure
      2. 8.4.2 Conversion Modes
        1. 8.4.2.1 LDO Conversion Mode
        2. 8.4.2.2 2/3x Conversion Mode
        3. 8.4.2.3 0.5x Conversion Mode
        4. 8.4.2.4 1/3x Conversion Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical Application Circuit for Fixed-Voltage and Adjustable-Voltage Versions
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Capacitor Selection
          2. 9.2.1.2.2 Resistor Combinations
        3. 9.2.1.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 DSP Supply With Sequencing
      2. 9.3.2 LC-Post Filter
      3. 9.3.3 Power Supply With Dynamic Voltage Scaling
      4. 9.3.4 Internet Audio Power Supply
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Voltage at VIN, EN, PG to GND(2) −0.3 7 V
Voltage at OUT, FB to GND −0.3 3.6 V
Voltage at C1F+, C1F−, C2F+, C2F− to GND −0.3 7 V
Output current at OUT 300 mA
TJ Maximum junction temperature 150 °C
Tstg Storage temperature −55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The voltage at EN, and PG can exceed VIN up to the maximum rated voltage without increasing the leakage current drawn by these mode select inputs.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VIM Input voltage at VIN 1.8 6.5 V
IOUT Output current at OUT 250 mA
CIN Input capacitor 2.2 µF
C1F, C2F Flying capacitors 1 µF
Output capacitor COUT for IOUT ≤ 150 mA 4.7 µF
COUT for 150 mA < IOUT < 250 mA 22
TJ Operating junction temperature −40 125 °C

7.4 Thermal Information

THERMAL METRIC(1) TPS6050x UNIT
DGS (VSSOP)
10 PINS
RθJA Junction-to-ambient thermal resistance 157 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 53 °C/W
RθJB Junction-to-board thermal resistance 76 °C/W
ψJT Junction-to-top characterization parameter 5.5 °C/W
ψJB Junction-to-board characterization parameter 75 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

at CIN = 4.7 µF, C1F = C2F = 1 µF, COUT = 10 µF, TA = −40°C to 85°C, VIN = 5 V, V(EN) = GND (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Supply voltage 1.8 6.5 V
IOUT Maximum output current VIN = 1.8 V to 2.7 V, VIN − VOUT > 1 V 50 mA
VIN ≥ 2.7 V, VIN − VOUT > 1 V 150
VOUT = 1.5 V, VIN ≥ 3.1 V 250
VIN ≥ 3.7 V, 1.8 V ≤ VOUT ≤ 2.5 V 250
VOUT > 2.5 V, VIN > VOUT + 1.2 V 250
VOUT Output voltage TPS60500 VIN > 2.7 V; VIN − VOUT > 1 V
at IOUT ≤ 150 mA,
VIN > 1.8 V; VIN − VOUT > 1 V
at IOUT ≤ 50 mA
0.8 3.3 V
TPS60501 3.3
TPS60502 1.8
TPS60503 1.5
V(FB) Feedback voltage TPS60500 0.8 V
Tolerance of output voltage TPS60501 IOUT = 0 mA to 150 mA, COUT = 47 µF –4% 3%
TPS60500
TPS60502
TPS60503
IOUT = 0 mA to 150 mA, COUT = 47 µF 3%
IOUT = 0 mA to 150 mA, COUT = 10 µF 4%
IOUT = 0 mA to 250 mA, COUT = 47 µF 4%
Vpp Output voltage ripple at OUT IOUT = 150 mA, VOUT = 1.5 V 30 mVPP
IQ Quiescent current (no-load input current) IOUT = 0 mA 40 75 µA
T(SD) Thermal shutdown temperature 150 °C
IOUT(SD) Shutdown supply current V(EN) = VIN 0.05 0.5 µA
f(OSC) Internal switching frequency 600 800 1200 kHz
VIL EN input low voltage 0.3 × VIN V
VIH EN input high voltage 0.7 × VIN V
Ilkg(SD) EN input leakage current V(EN) = 0 V or VIN 0.01 0.1 µA
Ilkg(FB) FB input leakage current TPS60500 0.1 µA
R(max) Maximum resistance of the external voltage divider TPS60500 R1 + R2 at FB pin 1
Short circuit current (start-up current) VIN = 6.5 V, VOUT = 0 V 100 300 mA
Output current limit VOUT > 0.6 V 500 mA
No load start-up time 80 µs
FOR POWER GOOD COMPARATOR:
V(PG) Power good trip voltage See (1) Vml – 2% V
td,r Power good delay time VOUT ramping positive 100 200 µs
td,f VOUT ramping negative 50 100 µs
VOL Power good output voltage low VOUT = 0 V, I(PG) = 1 mA 0.3 V
Ilkg Power good leakage current VOUT = 3.3 V, V(PG) = 3.3 V 0.01 0.1 µA
(1) Vml is the output voltage at the maximum load current. Vml is not a JEDEC symbol.

7.6 Typical Characteristics

TPS60500 TPS60501 TPS60502 TPS60503 typchar14.gif
Figure 1. Quiescent Current vs Input Voltage