3.2 Solution 2: Paralleling RC With Rlimit to Delay the Current Limit Response

This solution just can apply to TPS2583x/4x-Q1. TPS2583x/4x-Q1 is based on the voltage of Rlimit to determine whether or not it is overcurrent, as shown in Figure 8. So if you can delay the voltage rise, you can delay the current limit response. Think of parallel capacitors with Rlimit to achieve the delay. However, the internal circuit of the ILIMIT pin is a current source circuit. If you just parallel a capacitor with Rlimit as shown in Figure 9, it will introduce a pole into the current limit circuit as shown in Equation 1. The attenuation of gain and phase by pole will affect the loop stability. In order to eliminate the effect of the pole, you can add a resistor in the series with the capacitor to add a zero, as shown in Figure 10. This resistor introduces an additional zero point to reduce the influence of the pole, as shown in Equation 2. In order to ensure that the positions of zero and pole are close, setting Rpara = Rlimit is recommended. From the test result to ensure delay 1 ms, 82 nF is a suitable value for Cpara. In this section, the response under certification load is tested when using external FET or no external FET.