SLUUCM2A February   2022  – November 2022 BQ78350-R1

 

  1.   BQ78350-R1 TRM Addendum for the BQ78350-R3 Device
  2. 1General Description
  3. 2Production Plans
  4. 3Added Features
    1. 3.1 Cell Balancing at Rest
      1. 3.1.1 Cell Balancing DF Bits
      2. 3.1.2 0xB1 CB_REST_Enable()
  5. 4Revision History

3.1.1 Cell Balancing DF Bits

The [CB_REST] bit is added to the BQ78350-R3 in the following data flash location. Upon device POR, this bit is used to enable or disable the cell balance at rest/relax feature by default.

Class Subclass Name Format Size in Bytes Min Max Default Unit
Settings Configuration Balancing Configuration Hex 1 0x00 0xFF 0x01 Hex
7 6 5 4 3 2 1 0
RSVD RSVD RSVD RSVD RSVD RSVD CB_REST CB
RSVD (Bits 7–2): Reserved. Do not use.
CB_REST (Bit 1): Cell balancing operation at rest (without charge current detection) default configuration when cell balancing is enabled.
1 = Enabled
0 = Disabled (default)
CB (Bit 0): Cell balancing
1 = Enabled (default)
0 = Disabled in all cases