SLLU091A January   2006  – September 2022 ISO721 , ISO721M

 

  1. 1Introduction
  2. 2Overview
  3. 3Functional Configuration of the ISO721 and ISO721M
  4. 4EVM Signal Paths of the ISO721 and ISO721M Isolators
  5. 5The EVM Configuration
  6. 6EVM Setup and Operation
    1. 6.1 Overview
  7. 7Revision History

The EVM Configuration

The ISO721EVM configuration has an SMA connector J3 set up as the input to pin 2, the IN pin of the ISO721 in Figure 3-1 and Figure 4-1. A 0-Ω input series resistor, R8, is located next to the J3 input connector, and a 50-Ω R5 from the input to ground is located on the bottom of the board.

GUID-F799989B-05CA-4F2A-9AFD-7F4A631BEE5F-low.gifFigure 5-1 ISO721 and ISO721M EVM, Top

The output channel configuration of the ISO721EVM has the OUT pin (pin 6) of Figure 3-1 and Figure 4-1 connected to SMA connector J2 through a 0- Ω series resistor R4.

GUID-8B0486F9-1B4A-4329-9AEA-8C62DFCAA92D-low.gifFigure 5-2 ISO721 and ISO721M EVM, Bottom

The pads for R3, C12, and C13 are available on the bottom of the EVM for varied loading conditions if desired by a user.