SLLA600 October   2022 THVD8000 , THVD8010

 

  1.   Abstract
  2.   Trademarks
  3. 1Standard THVD80x0 Design Process and Assumptions
  4. 2Modifying THVD80x0 Design Process for Lower Voltage (≦36 V) AC Systems
  5. 3Simulating the New System
  6. 4Conclusion
  7. 5References

Modifying THVD80x0 Design Process for Lower Voltage (≦36 V) AC Systems

In the standard design process, it is assumed that the power source/loads have bulk capacitance associated with them so that the THVD80x0 Family of devices will see the inductor connect to ground instead of the power tree. In AC systems this bulk capacitance is often not included and if the standard design process is followed without modification there will be the potential for a high frequency signal on the power line or the power load – with the fundamental frequency of this signal being fmod. This violates one of the intentions of the use case by not blocking the modulated data signal from the power source and power loads. Luckily this can be fixed by adding a single capacitor at each power node from the sources output to ground or have a parallel capacitor w.r.t. to the power load. This capacitor has two key care abouts when implementing it into the system: Loading on AC power source and reduction in THVD80x0 Signal at power nodes.

The first care about is stress to the AC power source – as adding a capacitor on the source could potentially attenuate the power signal too much for power delivery to occur effectively. What this implies is that the capacitor across the power load/power source needs to be high impedance at the power line frequency (typically 50 Hz - 60 Hz) but low impedance at the modulation frequency of the data stream from the THVD80x0 device. To illustrate the design process the following is an example of how to determine the maximum capacitance.

Example 2.1: 10 Node System, 1 Source and 9 Loads with each load requiring 500 mA of current, VAC = 36 V at 60 Hz with a max current of 5 A possible.

  1. Calculate additional current budget by subtracting the summation of currents from all power loads from the max current. In this example that would be 5 A – 9 loads × 500 mA each – so there is an additional 500 mA possible out of the source.
  2. Calculate the current per node by dividing the additional current budget by the total number of nodes. In this example that would 500 mA/ 10 Nodes so each node can sink an extra 50 mA through a filtering capacitor.
  3. Use the source’s peak voltage and divide by the calculated current in step 2 to determine the minimum impedance that will be required to prevent the AC source from sagging due to overcurrent. In this example the minimum impedance that can be added to the power nodes would be 36 V divided by 50 mA which equals 720 Ω (in parallel with the source or load).
  4. Convert the minimum impedance to the maximum capacitance by finding the capacitor value that has an impedance value equal to what is found in step 3. For this example, it would be 1 divided by 2 × π × 60 Hz × 720 Ω which give the max capacitance value of approximately 3.68 uF.

With a boundary on capacitance decided on the next step is to implement that capacitor – as the maximum allowable value will provide the most attenuation to the data signal at the power nodes. This step is best done with a Spice based simulation program as systems with many nodes can end up being very time consuming if calculating by hand. Simulation setup and an example is detailed in the next section: Simulating the New System.

With the main modification out of the way – there are a couple other considerations that are added on when using an AC source. The first being that in DC systems the inductor is seen as a small resistance (DCR) and doesn’t have an active reactant term essentially creating a low impedance path at DC. With an AC signal – there is going to be reactant added to the impedance of the inductor as seen by the power source. So, when determining needed power source and load voltages – the attenuation of the power path cannot just include the DCR and trace impedance for its attenuation calculations, but must also include the reactant term based on the power source frequency. The best inductor value to choose is the minimum inductance value per node – as anything higher is unnecessary and would attenuate the power sources signal. The second consideration is the coupling capacitor between the THVD80x0 and the shared power/data bus. In DC systems the power source sees this as an open circuit – but with an AC source it is no longer high impedance. The minimum capacitance is the capacitance that has an impedance magnitude value of 5 Ω at modulation frequency will attenuate the power signal the most while still abiding by the requirements of the data bus. Since there is going to be AC leakage on the data node the need for a protection diode between A and B pins of every THVD80x0 device is present as anything out of the 12 V to -7 V range can cause damage to the THVD80x0 device. This protection diode is common, and often suggested, in most Powerbus and RS-485 application but it is even more so with an AC source as the capacitors between the communication node and the shared bus will not fully block the power signal.