SLLA565 September 2021 TUSB1044
General_3 Register 0x0C describes how the VOD and DC Gain are configured through the register.
Specifically, for VOD definition:
Table 3-4 shows the register 0x0C bit definition.
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | RESERVED | R | 0h |
Reserved |
6 | VOD_DCGAIN_OVERRIDE | R/W | 0h |
Setting of this field will allow software to use VOD linearity range and DC gain settings from registers instead of value sampled from pins 0h = VOD linearity and DC gain settings based on sampled CFG[2:1] pins. 1h = EQ settings based on programmed value of each VOD linearity and DC Gain registers. |
5-2 | VOD_DCGAIN_SEL | R/W | 0h |
Field selects VOD linearity range and DC gain for all the channels and in all directions. When VOD_DCGAIN_OVERRIDE = 0b, this field reflects the sampled state of CFG[1:0] pins. When VOD_DCGAIN_OVERRIDE = 1b software can change the VOD linearity range and DC gain for all the channels and in all directions based on value written to this field. Each CFG is a 2-bit value. The register-to-CFG1/0 mapping is: [5:2] = {CFG1[1:0], CFG0[1:0]} where CFGx[1:0] mapping is: 0h = 0 1h = R 2h = F 3h = 1 |
1-0 | DIR_SEL | R/W | 0h |
Sets the operation mode. 0h = USB + DP Alt Mode Source 1h = USB + DP Alt Mode Sink. 2h = USB + Custom Alt Mode Source 3h = USB + Custom Alt Mode Sink. |