SLAZ240Q October   2012  – May 2021 MSP430F478

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      ZQW113
      2.      PN80
      3.      ZCA113
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  CPU4
    2. 6.2  CPU19
    3. 6.3  EEM20
    4. 6.4  FLASH19
    5. 6.5  FLASH24
    6. 6.6  FLASH27
    7. 6.7  FLL3
    8. 6.8  FLL6
    9. 6.9  JTAG23
    10. 6.10 LCDA5
    11. 6.11 LCDA7
    12. 6.12 SDA6
    13. 6.13 TA12
    14. 6.14 TA16
    15. 6.15 TA21
    16. 6.16 TAB22
    17. 6.17 TB2
    18. 6.18 TB16
    19. 6.19 TB24
    20. 6.20 USCI20
    21. 6.21 USCI22
    22. 6.22 USCI23
    23. 6.23 USCI24
    24. 6.24 USCI25
    25. 6.25 USCI26
    26. 6.26 USCI28
    27. 6.27 USCI30
    28. 6.28 USCI34
    29. 6.29 USCI35
    30. 6.30 USCI40
    31. 6.31 XOSC5
    32. 6.32 XOSC8
    33. 6.33 XOSC9
  7. 7Revision History

USCI40

USCI Module

Category

Functional

Function

SPI Slave Transmit with clock phase select = 1

Description

In SPI slave mode with clock phase select set to 1 (UCAxCTLW0.UCCKPH=1), after the first TX byte, all following bytes are shifted by one bit with shift direction dependent on UCMSB. This is due to the internal shift register getting pre-loaded asynchronously when writing to the USCIA TXBUF register. TX data in the internal buffer is shifted by one bit after the RX data is received.

Workaround

Reinitialize TXBUF before using SPI and after each transmission.
If transmit data needs to be repeated with the next transmission, then write back previously read value:


UCAxTXBUF = UCAxTXBUF;