SLAZ181P October   2012  – May 2021 MSP430F2471

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PM64
      2.      RGC64
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  BCL12
    2. 6.2  BCL13
    3. 6.3  BCL15
    4. 6.4  COMP2
    5. 6.5  CPU19
    6. 6.6  FLASH19
    7. 6.7  FLASH24
    8. 6.8  FLASH25
    9. 6.9  FLASH27
    10. 6.10 FLASH36
    11. 6.11 JTAG23
    12. 6.12 PORT11
    13. 6.13 PORT12
    14. 6.14 TA12
    15. 6.15 TA16
    16. 6.16 TA21
    17. 6.17 TAB22
    18. 6.18 TB2
    19. 6.19 TB16
    20. 6.20 TB24
    21. 6.21 USCI20
    22. 6.22 USCI21
    23. 6.23 USCI22
    24. 6.24 USCI23
    25. 6.25 USCI24
    26. 6.26 USCI25
    27. 6.27 USCI26
    28. 6.28 USCI28
    29. 6.29 USCI30
    30. 6.30 USCI34
    31. 6.31 USCI35
    32. 6.32 USCI40
    33. 6.33 XOSC5
    34. 6.34 XOSC6
    35. 6.35 XOSC8
  7. 7Revision History

6.20 TB24

TB Module

Category

Functional

Function

TBIFG Flag is erroneously set after Timer B restarts in Up Mode

Description

In Up Mode, the TBIFG flag should only be set when the timer resets from TBCCR0 to zero. However, if the Timer B is stopped at TBR = TBCCR0, then cleared (TBR=0) by setting the TBCLR bit, and finally restarted in Up Mode, the next rising edge of the TBCLK will erroneously set the TBIFG flag.


GUID-20201119-CA0I-2MFX-CGFM-QGD7VTQHD8HN-low.png

Workaround

None.