SFFSAJ9A June   2025  – September 2025 UCC27289

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SOIC Package
    2. 2.2 VSON Package
  5. 3Failure Mode Distribution (FMD)
    1. 3.1 SOIC Package
    2. 3.2 VSON Package
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SOIC Package
    2. 4.2 VSON Package
  7. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the UCC27289 (SOIC and VSON packages). The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-2 through Table 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
Class Failure Effects
A Potential device damage that affects functionality.
B No device damage, but loss of functionality.
C No device damage, but performance degradation.
D No device damage, no impact to functionality or performance.

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • SOIC: Pins 1-4, short to VDD is considered
  • SOIC: Pins 5-6, short to 5V, such as, MCU or controller I/O supply is considered
  • SOIC: VSS is assumed to be a ground plane
  • VSON: Pins 1-5 and 10, short to VDD is considered
  • VSON: Pins 6-8, short to 5V, such as, MCU or controller I/O supply is considered
  • VSON: VSS is assumed to be a ground plane