SFFS752 November   2023 DRV8242-Q1

PRODMIX  

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 HW Variant in VQFN-RHL Package
    2. 4.2 SPI "S" and"P" Variant in VQFN-RHL Package

4.2 SPI "S" and"P" Variant in VQFN-RHL Package

Figure 4-3 shows the pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the DRV8242-Q1 data sheet.

GUID-20220809-SS0I-2ZQF-JV0K-LQTGWQPW7LQJ-low.svg Figure 4-3 SPI "P" Variant
GUID-20220809-SS0I-SDLT-D4HC-8NZXZLBBJNPG-low.svg Figure 4-4 SPI "S" variant
Table 4-6 Pin FMA for Device Pins Short-Circuited to Ground
Pin Description of Potential Failure Effect(s) Failure Effect Class
No. Name
1 SCLK SPI communication is lost. B
2 nSCS SPI communication is lost. B
3 IN2/PH Normal function as register bit is used for direction control. D
4 IN1/EN Load will be in re-circulation (braking). No risk of spin direction reversal. B
5 DRVOFF Pin based shutoff function is lost. B
6, 15 VM Device is powered off with driver Hi-Z. B
7, 8 OUT1 If OUT1 is commanded to be pulled high, short is detected and outputs are Hi-Z. B
9-12 GND Normal function. D
13, 14 OUT2 If OUT2 is commanded to be pulled high, short is detected and outputs are Hi-Z. B
16 nSLEEP/VDD Device will be in SLEEP state and outputs are Hi-Z. B
17 IPROPI IPROPI feedback is lost. ITRIP regulation, if enabled, is also lost. B
18 nFAULT False fault signalling possible. Device will continue to operate as commanded. B
19 SDO SPI communication is lost. B
20 SDI SPI communication is lost. B
Table 4-7 Pin FMA for Device Pins Open-Circuited
Pin Description of Potential Failure Effect(s) Failure Effect Class
No. Name
1 SCLK SPI communication is lost. B
2 nSCS SPI communication is lost. B
3 PH/IN2 Normal function as register bit is used for direction control. D
4 EN/IN1 Load will be in re-circulation (braking). No risk of spin direction reversal. B
5 DRVOFF Pin based shutoff is triggered and outputs are Hi-Z. B
6, 15 VM Device is powered off with driver Hi-Z. B
7, 8 OUT1 Load drive capability is lost. B
9, 10, 11, 12 GND Device is powered off with driver Hi-Z. B
13, 14 OUT2 Load drive capability is lost. B
16 nSLEEP Both "S" & "P" variants: Device will be in SLEEP state and outputs are Hi-Z. B
VDD
17 IPROPI IPROPI feedback is lost. Load will be forced to recirculate if ITRIP regulation is enabled. B
18 nFAULT False fault signaling possible. Device will continue to operate as commanded. B
19 SDO SPI communication is lost. B
20 SDI SPI communication is lost. B
Table 4-8 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Short between pins Description of Potential Failure Effect(s) Failure Effect Class
SCLK SDI SPI communication is lost. B
nSCS SCLK SPI communication is lost. B
PH/IN2 nSCS Normal function as register bit is used for direction control. D
EN/IN1 PH/IN2 External PWM control is lost. Internal ITRIP regulation is OK. No risk of spin direction reversal. D
DRVOFF EN/IN1 Outputs are either Hi-Z or load is in re-circulation state. B
VM DRVOFF Outputs are Hi-Z. B
OUT1 VM If OUT1 is commanded to be pulled low, short is detected and outputs are Hi-Z B
GND OUT1 If OUT1 is commanded to be pulled high, short is detected and outputs are Hi-Z. B
OUT2 GND If OUT2 is commanded to be pulled high, short is detected and outputs are Hi-Z. B
VM OUT2 If OUT2 is commanded to be pulled low, short is detected and outputs are Hi-Z. B
nSLEEP VM "S" variant: SLEEP functionality is lost B
VDD "P" variant: Device damage possible. Device behavior can not be guaranteed. A
IPROPI nSLEEP "S" variant: IPROPI feedback is inaccurate. ITRIP regulation levels, if enabled, will be lower. B
VDD "P" variant: IPROPI feedback is inaccurate. Outputs are Hi-Z if ITRIP regulation is enabled.
nFAULT IPROPI False fault signaling possible. IPROPI feedback is inaccurate. ITRIP regulation levels, if enabled, will be lower. B
SDO nFAULT False fault signaling possible. SPI communication will be affected during fault assertion. B
SDI SDO SPI communication is lost. B
Table 4-9 Pin FMA for Device Pins Short-Circuited to Supply VM
Pin Description of Potential Failure Effect(s) Failure Effect Class
No. Name
1 SCLK Device damage possible. A
2 nSCS Device damage possible. A
3 PH/IN2 Device damage possible. A
4 EN/IN1 Device damage possible. A
5 DRVOFF Outputs are Hi-Z. B
6, 15 VM Normal function. D
7, 8 OUT1 If OUT1 is commanded to be pulled low, short is detected and outputs are Hi-Z. B
9, 10, 11, 12 GND Device is powered off with driver Hi-Z. B
13, 14 OUT2 If OUT2 is commanded to be pulled low, short is detected and outputs are Hi-Z. B
16 nSLEEP "S" variant: SLEEP functionality is lost. B
VDD "P" variant: Device damage possible. A
17 IPROPI Device damage possible. A
18 nFAULT Device damage possible. A
19 SDO Device damage possible. A
20 SDI Device damage possible. A