SFFS522 February 2026 LMP8601-Q1
4.1 8-Pin SOIC and 8-Pin VSSOP Packages
Figure 4-1 shows the LMP860x-Q1 pin diagram for the 8-Pin SOIC package. Figure 4-2 shows the LMP860x-Q1 pin diagram for the 8-Pin VSSOP package. For a detailed description of the device pins, see the Pin Configuration and Functions section in the LMP860x-Q1 datasheets.
Figure 4-1 Pin Diagram (8-Pin SOIC) Package
Figure 4-2 Pin Diagram (8-Pin VSSOP Package)Table 4-2 Pin FMA for Device Pins
Short-Circuited to Ground
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| –IN | 1 | In a high-side configuration, a short from the bus supply to GND occurs (through RSHUNT). High current flows from the bus supply to GND. The shunt can be damaged. In a low-side configuration, The device operates as normal. | B for high-side |
| D for low-side | |||
| GND | 2 | The device operates as normal. | D |
| A1 | 3 | The preamplifier output is pulled down to GND and the output current is short-circuit limited. When left in this configuration for a long time, under high supplies, self-heating can cause the die junction temperature to exceed 150°C. | B |
| A2 | 4 | The input-to-output amplifier is shorted to ground, the output is stuck. | B |
| OUT | 5 | The output is pulled down to GND and the output current is short-circuit limited. When left in this configuration for a long time, under high supplies, self-heating can cause the die junction temperature to exceed 150°C. | B |
| VS | 6 | The power supply is shorted to GND. | B |
| OFFSET | 7 | The output of the DC offset is equal to GND. | D if OFFSET=GND by design |
| C otherwise | |||
| +IN | 8 | In a high-side configuration, a short from the bus supply to GND occurs. | B |
Table 4-3 Pin FMA for Device Pins
Open-Circuited
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| –IN | 1 | The shunt resistor is not connected to the amplifier. The IN+ pin can float to an unknown value. The output goes to an unknown value, not to exceed Vs or GND. | B |
| GND | 2 | There is no power to the device. The device can be biased through inputs. The output is no longer referenced to GND. | B |
| A1 | 3 | The preamplifier output can be left open. There is no effect on the device, but the output is not measured. | C |
| A2 | 4 | The input to the output buffer is floating. The output is not measured. | B |
| OUT | 5 | The output can be left open. There is no effect on the device, but the output is not measured. | C |
| VS | 6 | There is no power to device. The device can be biased through inputs. The output is incorrect and close to GND. | B |
| OFFSET | 7 | The DC offset is not defined. The output is not referenced to known voltage levels. | B |
| +IN | 8 | The shunt resistor is not connected to the amplifier. The IN- pin can float to an unknown value. The output goes to an unknown value, not to exceed Vs or GND. | B |
Table 4-4 Pin FMA for Device Pins
Short-Circuited to Adjacent Pin
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|---|
| –IN | 1 | 2 – GND | In a high-side configuration, a short from the bus supply to GND occurs (through RSHUNT). High current flows from the bus supply to GND. The shunt can be damaged. In a low-side configuration, the device operates as normal. | B for high-side |
| D for low-side | ||||
| GND | 2 | 3 – A1 | The preamplifier output is pulled down to GND and the output current is short-circuit limited. When left in this configuration for a long time, under high supplies, self-heating can cause the die junction temperature to exceed 150°C. | B |
| A1 | 3 | 4 – A2 | The device operates as normal. | D |
| A2 | 4 | 5 – OUT | The output amplifier is bypassed. | C |
| OUT | 5 | 6 – VS | The output is pulled to Vs and the output current is short-circuit limited. When left in this configuration for a long time, under high supplies, self-heating can cause the die junction temperature to exceed 150°C. | B |
| VS | 6 | 7 – OFFSET | The output of the DC offset is equal to VS. | D if OFFSET=VS by design |
| C otherwise | ||||
| OFFSET | 7 | 8 – +IN | In a high-side configuration, the absolute maximum voltage rating can be violated. In a low-side configuration, the output of the DC offset varies with shunt voltage. | A |
| C | ||||
| +IN | 8 | 1 – –IN | The inputs are shorted, the output is not measured. | C |
Table 4-5 Pin FMA for Device Pins
Short-Circuited to
Vs
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| –IN | 1 | In a high-side configuration, the power supply of the device is shorted to the bus supply (through RSHUNT). In a low-side configuration, the power supply of the device is shorted to GND. | B |
| GND | 2 | The power supply is shorted to GND. | B |
| A1 | 3 | The preamplifier output is shorted to VS and output current is short-circuit limited. When left in this configuration for a long time, under high supplies, self-heating can cause the die junction temperature to exceed 150°C. | B |
| A2 | 4 | The input-to-output amplifier is shorted to VS, the output is stuck. | B |
| OUT | 5 | The output is pulled to Vs and the output current is short-circuit limited. When left in this configuration for a long time, under high supplies, self-heating can cause the die junction temperature to exceed 150°C. | B |
| VS | 6 | The device operates as normal. | D |
| OFFSET | 7 | The output of the DC offset is equal to VS. | D if OFFSET=VS by design |
| C otherwise | |||
| +IN | 8 | In a high-side configuration, the power supply of the device is shorted to the bus supply. In a low-side configuration, the power supply of the device is shorted to GND (through RSHUNT). | B |