SFFS510 February 2025 TCAN1575-Q1
This section provides a failure mode analysis (FMA) for the pins of the TCAN1575-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
Table 4-2 through Table 4-7 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality. |
| B | No device damage, but loss of functionality. |
| C | No device damage, but performance degradation. |
| D | No device damage, no impact to functionality or performance. |
Figure 4-1 shows the TCAN1575-Q1 pin diagrams. For TCAN1575-Q1, pin 6 only supports SDO output and pin 7 only supports INH output. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TCAN157x-Q1 data sheet.
Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| TXD | 1 | Device enters dominant time out mode. Unable to transmit data from the processor to the CAN bus. | B |
| GND | 2 | None. | D |
| VCC | 3 | Transceiver not powered, high ICC current. | B |
| RXD | 4 | Transceiver output biased dominant. Unable to send data from the CAN bus to the processor. | B |
| VIO | 5 | Digital pins are not powered, high IIO current. No communication between the device and the processor is possible. | B |
| SDO | 6 | SDO biased low, no SPI read capability from the device to the processor. | B |
| INH | 7 | INH does not function, excessive VSUP current and not able to perform power enable function. | B |
| SCK | 8 | SCK is biased low, no SPI read or write capability between the device and the processor. | B |
| WAKE | 9 | Not able to transition to high, which does not allow the device to recognize a local wake up function. | B |
| VSUP | 10 | Device is not powered, high ISUP current. | B |
| SDI | 11 | SDI is biased low, no SPI write capability from the processor to the device. | B |
| CANL | 12 | VO(REC) specification is violated. Degraded EMC performance. | B |
| CANH | 13 | Device cannot drive dominant to the bus, no communication is possible. | B |
| nCS | 14 | nCS is biased low, SPI is always active. Only the first SPI transaction after power-up functions as expected. New SPI frames do not work as expected. | C |
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| TXD | 1 | Unable to transmit data from the processor to the CAN bus. | B |
| GND | 2 | Device is not powered. | B |
| VCC | 3 | Transceiver is not powered. | B |
| RXD | 4 | Unable to send data from the CAN bus to the processor. | B |
| VIO | 5 | Digital pins are not powered. Communication between the device and the processor is not possible. | B |
| SDO | 6 | SDO is internally biased to VIO. No SPI read capability from the device to the processor. | B |
| INH | 7 | INH is not able to perform a system power enable function. | B |
| SCK | 8 | SCK is internally biased to VIO. No SPI read or write capability between the device and the processor. | B |
| WAKE | 9 | Not able to transition, which does not allow the device to recognize a local wake up function. | B |
| VSUP | 10 | Device is not powered. | B |
| SDI | 11 | SDI is internally biased to VIO. No SPI write capability from the processor to the device. | B |
| CANL | 12 | Device cannot drive dominant to the bus, unable to communicate. | B |
| CANH | 13 | Device cannot drive dominant to the bus, unable to communicate. | B |
| nCS | 14 | nCS is internally biased to VIO. No SPI read or write capability between the device and the processor. | B |
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|---|
| TXD | 1 | GND | Device enters dominant time out mode. Unable to transmit data from the processor to the CAN bus. | B |
| GND | 2 | VCC | Device is not powered, high ICC current. | B |
| VCC | 3 | RXD | RXD output biased recessive, unable to communicate bus data to processor. | B |
| RXD | 4 | VIO | RXD output biased recessive, unable to communicate bus data to the processor. | B |
| VIO | 5 | SDO | No SPI read capability from the device to the processor. | B |
| SDO | 6 | INH | SDO pin is damaged due to high voltage. | A |
| SCK | 8 | WAKE | SCK pin can be damaged if WAKE pin is connected to VSUP. | A |
| WAKE | 9 | VSUP | Not able to transition to low, which does not allow the device to recognize a local wake up function. | B |
| VSUP | 10 | SDI | SDI pin is damaged and no SPI write communication from the processor to the device is possible. | A |
| SDI | 11 | CANL | SPI SDI bus line toggles on and off, based upon CAN traffic. During SPI communication, CANL can toggle, due to SDI traffic. | B |
| CANL | 12 | CANH | Bus is biased recessive, no communication is possible. IOS current can be reached on CANH or CANL. | B |
| CANH | 13 | nCS | During SPI communication, CANH can be biased dominant. | B |
There is a chance, if the thermal pad is soldered down, that the thermal pad can short to any pin on the device. What the thermal pad is soldered to determines the behavior.
Example: If the thermal pad is soldered to a ground plane then the adjacent pins behave as if shorted to ground.
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| TXD | 1 | Absolute maximum violation, pin can be damaged. Unable to communicate from the processor to the CAN bus. | A |
| GND | 2 | Device is not powered, high ISUP current, can damage the device. | A |
| VCC | 3 | Absolute maximum violation, pin can be damaged. Unable to communicate from the processor to the CAN bus. | A |
| RXD | 4 | Absolute maximum violation, pin can be damaged. Unable to communicate from the CAN bus to the processor. | A |
| VIO | 5 | Absolute maximum violation, pin can be damaged. | A |
| SDO | 6 | Absolute maximum violation, pin can be damaged. No SPI read capability from the device to the processor. | A |
| INH | 7 | INH is biased on and is not able to turn off. | B |
| SCK | 8 | Absolute maximum violation, pin can be damaged. No SPI read or write capability between the device and the processor. | A |
| WAKE | 9 | Not able to transition, which does not allow the device to recognize a local wake up function. | B |
| VSUP | 10 | None. | D |
| SDI | 11 | Absolute maximum violation, pin can be damaged, no SPI write capability from the processor to the device. | A |
| CANL | 12 | RXD is biased recessive, communication from the CAN bus to the processor is not possible. IOS current can be reached. | B |
| CANH | 13 | VO(REC) specification is violated. Can degrade EMC performance. | C |
| nCS | 14 | Absolute maximum violation, transceiver can be damaged. No SPI read or write capability between the device and the processor. | A |
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| TXD | 1 | TXD is biased recessive. Unable to transmit data from the processor to the CAN bus. Processor can be damaged if VCC > VIO. | B |
| GND | 2 | Device is not powered, high ICC current. | B |
| VCC | 3 | None. | D |
| RXD | 4 | Transceiver output biased is recessive. Unable to send data from the CAN bus to the processor. Processor can be damaged if VCC > VIO. | B |
| VIO | 5 | IO pins operate as 5V inputs or outputs. Processor can be damaged if VCC > VIO. | C |
| SDO | 6 | No SPI read capability from the device to the processor. Processor can be damaged if VCC > VIO. | B |
| INH | 7 | Can damage the transceiver if absolute maximum voltage on VCC is exceeded. | A |
| SCK | 8 | No SPI read or write capability between the device and the processor. Processor can be damaged if VCC > VIO. | B |
| WAKE | 9 | Can damage transceiver if absolute maximum voltage on VCC is exceeded. Potentially not able to transition states, which prevents the device from recognizing a local wake up function. | A |
| VSUP | 10 | Absolute maximum violation on VCC, transceiver can be damaged. Unable to communicate from the processor to the CAN bus. | A |
| SDI | 11 | No SPI write capability from the processor to the device. Processor can be damaged if VCC > VIO. | B |
| CANL | 12 | RXD is always recessive, no communication is possible. IOS current can be reached. | B |
| CANH | 13 | VO(REC) specification is violated, degraded EMC performance. | C |
| nCS | 14 | No SPI read or write capability between the device and the processor. Processor can be damaged if VCC > VIO. | B |
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| TXD | 1 | TXD is biased recessive. Unable to transmit data from the processor to the CAN bus. | B |
| GND | 2 | Device is not powered, high IIO current. | B |
| VCC | 3 | IO pins operate as 5V inputs or outputs. Processor can be damaged if VCC > VIO. | C |
| RXD | 4 | Transceiver output is biased recessive. Unable to send data from the CAN bus to the processor. | B |
| VIO | 5 | None. | D |
| SDO | 6 | No SPI read capability from the device to the processor. | B |
| INH | 7 | Can damage the transceiver if absolute maximum voltage on VIO is exceeded. | A |
| SCK | 8 | SCK is biased high. No SPI read or write capability between the device and the processor. | B |
| WAKE | 9 | Can damage the transceiver if absolute maximum voltage on VIO is exceeded. Potentially not able to transition states, which prevents the device from recognizing a local wake up function. | A |
| VSUP | 10 | Absolute maximum violation on the VIO pin, transceiver can be damaged. | A |
| SDI | 11 | SDI is biased high. No SPI write capability from the processor to the device. | B |
| CANL | 12 | RXD is biased recessive, no communication from the bus to the processor. IOS current can be reached if VIO ≥ 3.3V. | B |
| CANH | 13 | VO(REC) specification is violated. Can degrade EMC performance. | C |
| nCS | 14 | nCS is biased high. No SPI read or write capability between the device and the processor. | B |