SFFS510 February   2025 TCAN1575-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
  7. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the TCAN1575-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-2 through Table 4-7 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality.
BNo device damage, but loss of functionality.
CNo device damage, but performance degradation.
DNo device damage, no impact to functionality or performance.

Figure 4-1 shows the TCAN1575-Q1 pin diagrams. For TCAN1575-Q1, pin 6 only supports SDO output and pin 7 only supports INH output. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TCAN157x-Q1 data sheet.

TCAN1465-Q1 14-pin SOIC (D) Pin Diagram, Top View Figure 4-1 14-pin SOIC (D) Pin Diagram, Top View
TCAN1465-Q1 14-pin VSON
                    (DMT) Pin Diagram, Top View Figure 4-2 14-pin VSON (DMT) Pin Diagram, Top View
TCAN1465-Q1 14-pin SOT23 (DYY) Pin Diagram, Top View Figure 4-3 14-pin SOT23 (DYY) Pin Diagram, Top View

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • All conditions are within the recommended operating conditions
  • VSUP = see the recommended conditions in the device data sheet
  • VCC = 4.75V to 5.25V
  • VIO = 1.71V to 5.25V
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
TXD1Device enters dominant time out mode. Unable to transmit data from the processor to the CAN bus.B
GND2None.D
VCC3Transceiver not powered, high ICC current.B
RXD4Transceiver output biased dominant. Unable to send data from the CAN bus to the processor.B
VIO5Digital pins are not powered, high IIO current. No communication between the device and the processor is possible.B
SDO6SDO biased low, no SPI read capability from the device to the processor.B
INH7INH does not function, excessive VSUP current and not able to perform power enable function.B
SCK8SCK is biased low, no SPI read or write capability between the device and the processor.B
WAKE9Not able to transition to high, which does not allow the device to recognize a local wake up function.B
VSUP10Device is not powered, high ISUP current.B
SDI11SDI is biased low, no SPI write capability from the processor to the device.B
CANL12VO(REC) specification is violated. Degraded EMC performance.B
CANH13Device cannot drive dominant to the bus, no communication is possible.B
nCS14nCS is biased low, SPI is always active. Only the first SPI transaction after power-up functions as expected. New SPI frames do not work as expected.C
Note: The VSON (DMT) package includes a thermal pad that is not always soldered to GND. Verify if the thermal pad is, or is not, soldered to GND.
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
TXD1Unable to transmit data from the processor to the CAN bus.B
GND2Device is not powered.B
VCC3Transceiver is not powered.B
RXD4Unable to send data from the CAN bus to the processor.B
VIO5Digital pins are not powered. Communication between the device and the processor is not possible.B
SDO6SDO is internally biased to VIO. No SPI read capability from the device to the processor.B
INH7INH is not able to perform a system power enable function.B
SCK8SCK is internally biased to VIO. No SPI read or write capability between the device and the processor.B
WAKE9Not able to transition, which does not allow the device to recognize a local wake up function.B
VSUP10Device is not powered.B
SDI11SDI is internally biased to VIO. No SPI write capability from the processor to the device.B
CANL12Device cannot drive dominant to the bus, unable to communicate.B
CANH13Device cannot drive dominant to the bus, unable to communicate.B
nCS14nCS is internally biased to VIO. No SPI read or write capability between the device and the processor.B
Note: The VSON (DMT) package includes a thermal pad that is not always soldered to GND. Verify if the thermal pad is, or is not, soldered to GND.
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure EffectsFailure Effect Class
TXD1GNDDevice enters dominant time out mode. Unable to transmit data from the processor to the CAN bus.B
GND2VCCDevice is not powered, high ICC current.B
VCC3RXDRXD output biased recessive, unable to communicate bus data to processor.B
RXD4VIORXD output biased recessive, unable to communicate bus data to the processor.B
VIO5SDONo SPI read capability from the device to the processor.B
SDO6INHSDO pin is damaged due to high voltage.A
SCK8WAKESCK pin can be damaged if WAKE pin is connected to VSUP.A
WAKE9VSUPNot able to transition to low, which does not allow the device to recognize a local wake up function.B
VSUP10SDISDI pin is damaged and no SPI write communication from the processor to the device is possible.A
SDI11CANLSPI SDI bus line toggles on and off, based upon CAN traffic. During SPI communication, CANL can toggle, due to SDI traffic.B
CANL12CANHBus is biased recessive, no communication is possible. IOS current can be reached on CANH or CANL.B
CANH13nCSDuring SPI communication, CANH can be biased dominant.B
Note: The VSON (DMT) package includes a thermal pad.

There is a chance, if the thermal pad is soldered down, that the thermal pad can short to any pin on the device. What the thermal pad is soldered to determines the behavior.

Example: If the thermal pad is soldered to a ground plane then the adjacent pins behave as if shorted to ground.

Table 4-5 Pin FMA for Device Pins Short-Circuited to VSUP Supply
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
TXD1Absolute maximum violation, pin can be damaged. Unable to communicate from the processor to the CAN bus.A
GND2Device is not powered, high ISUP current, can damage the device.A
VCC3Absolute maximum violation, pin can be damaged. Unable to communicate from the processor to the CAN bus.A
RXD4Absolute maximum violation, pin can be damaged. Unable to communicate from the CAN bus to the processor.A
VIO5Absolute maximum violation, pin can be damaged.A
SDO6Absolute maximum violation, pin can be damaged. No SPI read capability from the device to the processor.A
INH7INH is biased on and is not able to turn off.B
SCK8Absolute maximum violation, pin can be damaged. No SPI read or write capability between the device and the processor.A
WAKE9Not able to transition, which does not allow the device to recognize a local wake up function.B
VSUP10None.D
SDI11Absolute maximum violation, pin can be damaged, no SPI write capability from the processor to the device.A
CANL12RXD is biased recessive, communication from the CAN bus to the processor is not possible. IOS current can be reached.B
CANH13VO(REC) specification is violated. Can degrade EMC performance.C
nCS14Absolute maximum violation, transceiver can be damaged. No SPI read or write capability between the device and the processor.A
Note: The VSON (DMT) package includes a thermal pad.
Table 4-6 Pin FMA for Device Pins Short-Circuited to VCC Supply
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
TXD1TXD is biased recessive. Unable to transmit data from the processor to the CAN bus. Processor can be damaged if VCC > VIO.B
GND2Device is not powered, high ICC current.B
VCC3None.D
RXD4Transceiver output biased is recessive. Unable to send data from the CAN bus to the processor. Processor can be damaged if VCC > VIO.B
VIO5IO pins operate as 5V inputs or outputs. Processor can be damaged if VCC > VIO.C
SDO6No SPI read capability from the device to the processor. Processor can be damaged if VCC > VIO.B
INH7Can damage the transceiver if absolute maximum voltage on VCC is exceeded.A
SCK8No SPI read or write capability between the device and the processor. Processor can be damaged if VCC > VIO.B
WAKE9Can damage transceiver if absolute maximum voltage on VCC is exceeded. Potentially not able to transition states, which prevents the device from recognizing a local wake up function.A
VSUP10Absolute maximum violation on VCC, transceiver can be damaged. Unable to communicate from the processor to the CAN bus.A
SDI11No SPI write capability from the processor to the device. Processor can be damaged if VCC > VIO.B
CANL12RXD is always recessive, no communication is possible. IOS current can be reached.B
CANH13VO(REC) specification is violated, degraded EMC performance.C
nCS14No SPI read or write capability between the device and the processor. Processor can be damaged if VCC > VIO.B
Note: The VSON (DMT) package includes a thermal pad.
Table 4-7 Pin FMA for Device Pins Short-Circuited to VIO Supply
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
TXD1TXD is biased recessive. Unable to transmit data from the processor to the CAN bus.B
GND2Device is not powered, high IIO current.B
VCC3IO pins operate as 5V inputs or outputs. Processor can be damaged if VCC > VIO.C
RXD4Transceiver output is biased recessive. Unable to send data from the CAN bus to the processor.B
VIO5None.D
SDO6No SPI read capability from the device to the processor.B
INH7Can damage the transceiver if absolute maximum voltage on VIO is exceeded.A
SCK8SCK is biased high. No SPI read or write capability between the device and the processor.B
WAKE9Can damage the transceiver if absolute maximum voltage on VIO is exceeded. Potentially not able to transition states, which prevents the device from recognizing a local wake up function.A
VSUP10Absolute maximum violation on the VIO pin, transceiver can be damaged.A
SDI11SDI is biased high. No SPI write capability from the processor to the device.B
CANL12RXD is biased recessive, no communication from the bus to the processor. IOS current can be reached if VIO ≥ 3.3V.B
CANH13VO(REC) specification is violated. Can degrade EMC performance.C
nCS14nCS is biased high. No SPI read or write capability between the device and the processor.B
Note: The VSON (DMT) package includes a thermal pad.