SFFS434A december   2022  – july 2023 TMP1826

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 VSSOP-8 Package
    2. 2.2 WSON-8 Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 VSSOP-8 Package
    2. 4.2 WSON-8 Package
  7. 5Revision History

4.2 WSON-8 Package

Figure 4-2 shows the TMP1826 pin diagram for the WSON-8 package. For a detailed description of the device pins, see the Pin Configuration and Functions section in the TMP1826 data sheet.

GUID-20210210-CA0I-X6VG-XJVV-T1VRX2B9LBFT-low.gifFigure 4-2 Pin Diagram (WSON-8 Package)
Table 4-6 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class

ADDR

3Limited address selection. Application has to revert to 64 bit addressing mode.

C

If ADDR selection is not being used then no effect.

D

GND4No effect. Normal operation.

D

IO0

6If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

IO1

7

If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

IO2

8

If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

IO3

5

If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

SDQ

2

No communication

B

VDD

1Device is in bus powered mode

C

Table 4-7 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class

ADDR

3Limited address selection. Application has to revert to 64 bit addressing mode.

C

GND4

When floating, possible latch-up

B

IO0

6If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

IO1

7If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

IO2

8If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

IO3

5If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

SDQ

2No communication

B

VDD

1Device is in bus powered mode

C

Table 4-8 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure Effect(s)Failure Effect Class

ADDR

3

SDQ

The absolute maximum for ADDR pin is 1.65 V and if shorted to SDQ and SDQ being pulled to 5.5V could cause leakage currents to increase and damage the device during ADDR detection.

A

GND

4

ADDR

If ADDR is shorted to GND then limited address selection. Application has to revert to 64 bit addressing mode.

C

GND is shorted to ADDR will have no affect during normal operation.

D

IO0

6

IO1

If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

IO0

6

IO3

If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

IO1

7

IO2

If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

IO1

7

IO0

If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

IO2

8

IO1

If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

IO3

5

IO0

If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

SDQ

2VDDLoss of functionality. Communication will be lost.

B

VDD1

SDQ

Loss of functionality. Communication will be lost.

B

Table 4-9 Pin FMA for Device Pins Short-Circuited to Supply
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class

ADDR

3Absolute maximum could be exceeded if ADDR pin is being used for address decoding.A
Other cases no device damage.

D

GND4Device unpowered. Device not functional. Make sure that the absolute maximum ratings for all device pins are met, otherwise device damage may be plausible.

B

IO0

6If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

IO1

7If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

IO2

8If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

IO3

5If I/O is used for controlling external component, functionality is lost.

B

If I/O is not being used then no effect.

D

SDQ

3Loss of functionality. Communication will be lost.

B

VDD

1No effect. Normal operation.

D