SFFS432 August   2022 ISO6760L

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 16-SOIC (wide-body SOIC) Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 16-DW (wide-body SOIC) Package

1 Overview

This document contains information for ISO6760L and ISO6760LN (16-DW package) to aid in a functional safety system design. Information provided are:

  • Functional Safety Failure In Time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
  • Component failure modes and their distribution (FMD) based on the primary function of the device
  • Pin failure mode analysis (Pin FMA)

Figure 1-1 shows the device functional block diagram of one channel of ISO6760L and ISO6760LN for reference.

GUID-28E661EC-DEFF-45B5-A91C-81FCC1AA1DA9-low.gif Figure 1-1 Functional Block Diagram

ISO6760L and ISO6760LN was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.