SFFS047 January   2021 TPS1HB50-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)

Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the TPS1HB50-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to Ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality
BNo device damage, but loss of functionality
CNo device damage, but performance degradation
DNo device damage, no impact to functionality or performance

Figure 4-1 shows the TPS1HB50-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TPS1HB50-Q1 data sheet.

GUID-C8541E13-1176-44D4-8955-30CF721D77E4-low.gif Figure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • Follows data sheet recommendation for operating conditions, external component selection and PCB layout
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
GND1Resistor/diode network will be bypassed if present.B
SNS2SNS current diagnostic not available. B
LATCH3Normal operation. With device in auto-retry mode. B
EN4Normal operation with output off (FET turned off). B
ILIM5Current limit defaults to internal limit B
VOUT6,7,8Short to GND protection kicks in to protect the device. B
NC9,10,11,12,13,15 No effect.D
SEL14Normal operation with diagnostics corresponding to SEL=LOW.B
DIAG_EN16Normal operation with diagnostics function disabled. B
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
GND1The output is off with the FET turned off. B
SNS2SNS current diagnostic not available. B
LATCH3Normal operation with device in auto-retry mode. Internal pull=down resistor will pull pin to GND. B
EN4Normal operation with output off (FET turned off). Internal pull-down resistor will pull pin to GND. B
ILIM5Current limit defaults to internal limitB
VOUT6,7,8Output off. Open load detection will be triggered in off-state while in diagnostics state. B
NC9,10,11,12,13,15 No effect.D
SEL14Normal operation with diagnostics corresponding to SEL=LOW. Internal pull-down resistor will pull pin to GND.B
DIAG_EN16Normal operation with diagnostics function disabled. Internal pull-down resistor will pull pin to GND.B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure Effect(s)Failure Effect Class
GND12 (SNS)SNS current diagnostic not available. B
SNS23 (LATCH)Depends on pin voltage. Sense output may not be correct. Latch function may be enabled if pin voltage > VIH; latch function may be disabled if pin voltage < VIL. B
LATCH34 (EN)Device behavior depends on pin voltage. Latch function may be enabled if pin voltage > VIH; Latch function may be disabled if pin voltage < VIL.B
EN45 (/FLT)Channel may be enabled if pin voltage > VIH; channel may be disabled if pin voltage < VIL. Fault pin will not work as intended. B
ILIM56 (VOUT)Current limit defaults to internal limit.B
NC9,10,11,12,1314 (SEL)No effect.D
SEL1415 (NC) No effect.D
NC1516 (DIAG_EN) No effect.D
DIAG_EN1615 (NC) No effect.D
Table 4-5 Pin FMA for Device Pins Short-Circuited to supply
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
GND1Supply power will be bypassed and device will not turn on.B
SNS2If pin voltage exceeds the pin data sheet range, it may cause device damage due to voltage breakdown on ESD circuit.A
LATCH3If pin voltage exceeds the pin data sheet range, it may cause device damage due to voltage breakdown on ESD circuit. Device behavior depends on supply voltage.A
EN4If pin voltage exceeds the pin data sheet range, it may cause device damage due to voltage breakdown on ESD circuit.A
ILIM5Current limit defaults to internal limit.B
VOUT6,7,8Output stuck on to supply. Open load detection will be triggered in off-state in diagnostics state.C
NC9,10,11,12,13,15 No effect.D
SEL14If pin voltage exceeds the pin data sheet range, it may cause device damage due to voltage breakdown on ESD circuit.A
DIAG_EN16If pin voltage exceeds the pin data sheet range, it may cause device damage due to voltage breakdown on ESD circuit.A