SDAA352 May   2026 TDA4VM

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2System Architecture
    1. 2.1 Core Configuration
    2. 2.2 Power Domain Architecture
    3. 2.3 IPC Framework Overview
  6. 3Heartbeat Monitoring Design
    1. 3.1 Ping-Pong Protocol
    2. 3.2 Dual-Task Architecture
    3. 3.3 Crash Detection Logic
  7. 4 Recovery Mechanism
    1. 4.1 Power State Transitions
  8. 5 Implementation Details
    1. 5.1 Configuration Parameters
    2. 5.2 Parameter Tuning Guidance:
    3. 5.3 Linux-Side rpmsg_char Implementation
  9. 6 Test Results and Performance
    1. 6.1 Timing Profile
    2. 6.2 Recovery Verification
  10. 7Summary
  11. 8References

6.1 Timing Profile

The timing profiling system captures timestamps at key points during the recovery process. Table 6-1 shows measured values from actual test runs.

Table 6-1 Time Profile
Phase Duration (usec) Duration (ms)
Crash Detection -> Start MCU ONLY Prep 34 - 38 Approximately 0.035
ACTIVE -> MCU ONLY Transition 7011 - 7044 Approximately 7.0
MCU ONLY -> ACTIVE Transition 150711 - 150752 Approximately 150.7
Linux A72 Core Boot 1069435 Approximately 1069.4
TOTAL RECOVERY TIME Approximately 1227

The total recovery time of approximately 1227ms compares favorably to a full power cycle boot time of approximately 1333ms, providing a savings of about 105ms while maintaining all MCU domain state.