SDAA236 March   2026 DS90UB960-Q1

 

  1.   1
  2.   Abstract
  3. 1Introduction
  4. 2ADAS FPD-Link III Deserializer Overview
  5. 3MIPI CSI-2 Overview
    1. 3.1 MIPI CSI-2 Frame Break Down
    2. 3.2 MIPI CSI-2 Overhead Introduction
  6. 4CSI-2 Input Bandwidth Calculation
  7. 5CSI-2 Output Bandwidth Calculation
    1. 5.1 CSI-2 Aggregation Overview
    2. 5.2 CSI-2 Output Bandwidth Calculation
  8. 6Summary
  9. 7References

MIPI CSI-2 Frame Break Down

There are two different packet types of MIPI CSI-2, long and short packets. Short packets use a 32-bit frame structure and are commonly used for signaling frame start, frame end, or other synchronization information from the source. Long packets have a variable byte count based on the format of the data to be transmitted and are typically used to transmit a single video line. In each long and short packet, there is a header which stores information about the type of packet (data ID) and which virtual channel (VC) source the information came from.

One typical video frame transmitted via CSI-2 can be broken down into the following items.

  • Frame start – 32-bit short packet
  • Low-Power State (LPS)
  • The 1st line of valid video data – Long packet, which is further divided into:
    • 32-bit packet header (packet header)
    • Valid data, for example, for RAW12, two pixels have 24 bits
    • 16-bit packet footer (packet footer)
  • Low-Power State (LPS)
  • The 2nd line of valid video data
  • Low-Power State (LPS)
  • The 3rd line of valid video data
  • Frame end – 32-bit short packets
 MIPI CSI-2 Long Packets Figure 3-1 MIPI CSI-2 Long Packets
 MIPI CSI-2 Short Packets Figure 3-2 MIPI CSI-2 Short Packets
 Long Line Packets
and Short Frame Sync Packets Figure 3-3 Long Line Packets and Short Frame Sync Packets