SDAA184 June   2026 TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SG-Q1 , TMS320F28P559SJ-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Power Stage Overview
  6. 3Software Overview
    1. 3.1 Software Architecture
      1. 3.1.1 Devcie Initialization
        1. 3.1.1.1 Analog Peripherals Initialization
        2. 3.1.1.2 Control Peripherals Intialization
          1. 3.1.1.2.1 EPWM Initialization
          2. 3.1.1.2.2 CLB Initialization
        3. 3.1.1.3 System Peripherals Initialization
      2. 3.1.2 Interrupt Structure
    2. 3.2 PowerSuite Usage
  7. 4Lab Structure
    1. 4.1 Hardware Setup
    2. 4.2 Lab1
    3. 4.3 Lab2
    4. 4.4 Lab3
    5. 4.5 Lab4
  8. 5Summary

Abstract

This document provides the software documentation for a digitally controlled Asymmetrical Half Bridge (AHB) converter, a Flyback-derived resonant topology designed for high-efficiency and wide-output power conversion. The firmware implements zero-voltage switching (ZVS) control using a fast PWM on-time calculation and adaptive zero-voltage detection (ZVD) technique to maintain boundary ZVS across varying input and load conditions. It also includes programmable ZCD count control, adaptive soft-start, and inductance compensation algorithms to ensure stable performance under production variations.

The software has been validated on a 280 W AHB hardware prototype, achieving a peak efficiency of 97.8% at 28 V / 9A. This documentation details the software structure, control algorithms, and implementation methods that enable robust digital control of AHB converters, targeting high-power applications (>100 W) such as USB PD 3.1 adapters, industrial chargers, and power tools.