SDAA150 December   2025 ADS124S06 , ADS124S08

 

  1.   1
  2.   Abstract
  3. 1Circuit Design and Test System
    1. 1.1 Design Overview
    2. 1.2 Overview of EMC Test Board for RTD Measurements
      1. 1.2.1 Input Configurations and ADC Settings
        1. 1.2.1.1 Configuration and settings for a 3-wire RTD measurement with a low-side reference
        2. 1.2.1.2 Configuration and settings for a 3-wire RTD measurement with a high-side reference
      2. 1.2.2 Temperature Error - RTD Measurement
        1. 1.2.2.1 Calculating RTD temperature from RTD resistance
        2. 1.2.2.2 Calculating the temperature error from RTD measurements
        3. 1.2.2.3 Experimental setup and results
    3. 1.3 Overview of EMC Test Board for TC Measurements
      1. 1.3.1 Input Configurations and ADC Settings
        1. 1.3.1.1 Input Configurations
        2. 1.3.1.2 Thermocouple Characteristics and ADC Settings
      2. 1.3.2 Temperature Error - TC Measurement
        1. 1.3.2.1 Calculating temperature from TC thermoelectric voltage
        2. 1.3.2.2 Calculating the temperature error from TC measurements
        3. 1.3.2.3 Experimental setup and results
    4. 1.4 Circuit Design Considerations for EMC compliance
      1. 1.4.1 Analog Input Protection
      2. 1.4.2 Anti-aliasing Filter
      3. 1.4.3 High-voltage Capacitors on Every Input Connector Pin
      4. 1.4.4 High-voltage Capacitors and Resistors for Discharging Path
      5. 1.4.5 Series Resistors on Digital Signals
      6. 1.4.6 Digital Isolation
      7. 1.4.7 Power Supply and Protection
    5. 1.5 PCB Layout Consideration for EMC compliance
      1. 1.5.1 PCB Layer Stack-up and Ground Plane
      2. 1.5.2 Avoiding a Long Return Path
      3. 1.5.3 Avoiding 90-degree Bends in PCB Traces
      4. 1.5.4 Using Guard Ring to Isolate Interference Signals
      5. 1.5.5 Decoupling Capacitors
      6. 1.5.6 Differential Signal Routing
      7. 1.5.7 Stitching Vias
      8. 1.5.8 Layout for Isolation Barrier
      9. 1.5.9 Component Placement
    6. 1.6 Test System
  4. 2Test Details and Results
    1. 2.1 Standards and Test Criteria
    2. 2.2 Electrostatic Discharge (ESD)
    3. 2.3 Radiated Immunity (RI)
    4. 2.4 Electrical Fast Transients (EFT)
    5. 2.5 Surge Immunity (SI)
    6. 2.6 Conducted Immunity (CI)
  5. 3Schematic, PCB Layout and Bill of Materials
    1. 3.1 Schematic - RTD EMC Test Board
    2. 3.2 Schematic - TC EMC Test Board
    3. 3.3 PCB Layout - RTD EMC Test Board (4-Layer)
    4. 3.4 PCB Layout - RTD EMC Test Board (2-Layer)
    5. 3.5 PCB Layout - TC EMC Test Board (4-Layer)
    6. 3.6 PCB Layout - TC EMC Test Board (2-Layer)
    7. 3.7 Bill of Materials - RTD EMC Test Board
    8. 3.8 Bill of Materials - TC EMC Test Board
  6. 4Summary
  7. 5References

1.5.3 Avoiding 90-degree Bends in PCB Traces

Trace geometry can significantly affect signal integrity and emissions. Sharp 90-degree bends in PCB traces should be avoided, as they create impedance discontinuities that may result in signal reflections and increase high frequency radiation. Instead, route traces with two 45-degree bends or smooth arcs when making turns to preserve controlled impedance and minimize emissions. Adhering to such guidance is a good practice for maintaining signal integrity in analog signal routing, while it is more critical in high-speed digital circuits.

Figure 1-21 shows an example for avoiding 90-degree Bends on the EMC test boards.

Avoiding 90-degree bends in PCB TracesFigure 1-21 Avoiding 90-degree bends in PCB Traces.