SCEA113 October   2021 TPS650861 , TPS650864

 

  1.   Trademarks
  2. 1Introduction
  3. 2TPS65086x Overview
  4. 3TPS65086x Variants
  5. 4TPS65086x Selection Guide
  6. 5TPS650861 Programming Information
  7. 6Example Power Maps
    1. 6.1 Always On: Power and Efficiency Optimized (-1L and -2L devices)
    2. 6.2 Always On: Cost Optimized (-1 and -2 devices)
    3. 6.3 Always On: PL Performance Optimized (-3 Devices)
    4. 6.4 Full Power Domain (All speed grades)
  8. 7Conclusion

6 Example Power Maps

The following sections provide an example power map for each of the four Xilinx power configurations outlined in Table 4-1. For each configuration, both a pre-programmed variant and the user-programmable TPS650861 can be used.

For more information on the power configurations and rail consolidations, please refer to Xilinx Zynq UltraScale+ and UltraScale Architecture PCB Design.