SBVK009A August   2022  – November 2022 LP5912-EP

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Qualification by Similarity (Qualification Family)
  5. 3Technology Family FIT and MTBF Data
  6. 4Device Family Qualification Data
  7. 5Ongoing Reliability Monitoring
  8. 6Summary
  9. 7Revision History

Qualification by Similarity (Qualification Family)

A new device can be qualified either by performing full-scale quality and reliability tests on the actual device or using previously qualified devices through the qualification by similarity" (QBS) rules. By establishing similarity between the new device and those qualified previously, repetitive tests are eliminated, allowing for timely production release. When adopting QBS methodology, the emphasis is on qualifying the differences between a previously qualified product and the new product under consideration. The QBS rules for a technology, product, test parameters, or package define which attributes are required to remain fixed for the QBS rules to apply. The attributes that are expected and allowed to vary are reviewed and a QBS plan is developed, based on the reliability impact assessment, specifying what subset of the full complement of environmental stresses is required to evaluate the reliability impact of those variations. Each new device is reviewed for conformance to the QBS rule sets applicable to that device. See JEDEC JESD47 for more information.

Table 2-1 Device Baseline
Baseline(1)
Description Condition Description Condition
TI device

LP591209-EP

LP591212-EP

LP591218-EP

LP591225-EP

LP591230-EP

LP591233-EP

LP591250-EP

Assembly site TI CLARK (Philippines)
DLA VID

V62/22601-01XE

V62/22601-04XE

V62/22601-06XE

V62/22601-07XE

V62/22601-09XE

V62/22601-10XE

V62/22601-11XE

Test site TI CLARK (Philippines)
Wafer fab TI MIHO8 (Japan) Pin, package type WSON (DRV) | 6
Fab process LBC7T Leadframe Cu
Fab technology CMOS Termination finish NiPdAu
Die revision A Mount compound SUMITOMO CRM-1076NS
Die name LLP5912MA3Z Bond wire 25.4 μm Au
ESD CDM ±1000 V Mold compound SUMITOMO EME-G700LTD
ESD HBM ±2000 V Moisture sensitivity MSL 2 / 260°C
Baseline information in effect as of the date of this report.
Table 2-2 Enhanced Products New Device Qualification Matrix Qualification by similarity (qualification family per JEDEC JESD47 is allowed)
Description Condition Sample Size (Allowed Rejects) Lots Required Test Method
Electromigration Maximum recommended operating conditions N/A N/A Per TI design rules
Wire bond life Maximum recommended operating conditions N/A N/A Per TI design rules
Electrical characterization TI data sheet 15 3 N/A
Electrostatic discharge sensitivity HBM 3 units/voltage N/A EIA/JESD22-A114
or
ANSI/ESDA/JEDEC JS-001
CDM EIA/JESD22-C101
or
ANSI/ESDA/JEDEC JS-002
Latch-up Per technology 3(0) 1 EIA/JESD78
Physical dimensions TI data sheet 5(0) 1 EIA/JESD22- B100
Thermal impedance θJA on board Per pin-package N/A EIA/JESD51
Bias life test 125°C/1000 hours or equivalent 45(0) 3 JESD22-A108(1)
Biased humidity 85°C/85%/1000 hours 77(0) 3 JESD22-A101(1)
or
Biased HAST 130°C/85%/96 hours or 110°C/85%/264 hours JESD22-A110(1)
Extended biased humidity(2) 85°C/85%/2600 hours 77(–) 1 JESD22-A101(1)
or
Extended biased HAST(2) 130°C/85%/250 hours or 110°C/85%/687 hours JESD22-A110(1)
Unbiased HAST 130°C/85%/96 hours or 110°C/85%/264 hours 77(0) 3 JESD22-A.118(1)
Temperature cycle –65°C to +150°C non-biased for 500 cycles 77(0) 3 JESD22-A104(1)
Solder heat 230°C–250°C for 30-60 seconds 22(0) 1 JESD22-B106
Resistance to solvents Ink symbol only 12(0) 1 JESD22-B107
Solderability Bake preconditioning 22(0) 1 ANSI/J-STD-002
Flammability Method A or method B 5(0) 1 UL94
Bond shear Per wire size 5 units × 30(0) bonds 3 JESD22-B116
Bond pull strength Per wire size 5 units x 30(0) bonds 3 ASTM F-459 or TM2011
Die shear Per die size 5(0) 3 TM 2019
High temperature storage 150°C / 1,000 hours 15(0) 3 JESD22-A103(1)
Moisture sensitivity Surface mount only 12 1 J-STD-020(1)
Precondition performed per JEDEC std. 22, method A112/A113.
For information only.