Figure 4-12 illustrates the main disadvantage of the R_ISO method. When an amplifier with an isolation resistance drives a resistive load, a voltage divider is formed. The voltage divider attenuates the amplifier output at the load:

The graph in Figure 4-12 shows that the 10mV step input is attenuated by 2.67mV at the output. The attenuation is a gain error that can be calibrated out if the load resistance is well controlled, but this is not practical in some cases. The R_ISO-dual-feedback topology eliminates the voltage divider effect seen in the R_ISO method by using an output sense feedback path. Figure 4-13 shows the R_ISO-dual-feedback implementation with the same op amp and capacitive load as Figure 4-5. Notice that V_OUT on the R_ISO-dual-feedback circuit settles to the same voltage as the input signal. The amplifier output (V_O in Figure 4-13) settles to a voltage greater than the input signal to compensate for the drop across R_ISO. The voltage swing of the R_ISO-dual-feedback circuit at the load (R_L) is limited by the voltage drop across R_ISO.

Figure 4-12 R_ISO Voltage Attenuation at the Load

Figure 4-13 R_ISO-Dual-Feedback Voltage at Load Equal to Input (V_S = V_OUT)

At low frequencies, the impedance of a capacitor can be considered an open circuit, and at high frequencies the impedance is a short circuit:

The R_ISO-dual-feedback circuit operation can be understood by considering the low and high-frequency operation separately (see Figure 4-14). At low frequency, the feedback capacitor is open and the feedback resistor R_F senses the output V_OUT. The op amp adjusts the output V_O until V_O = V_OUT. For the DC circuit, the voltage on the inverting and non-inverting input are equal due to the virtual short. Since there is no current flowing through R_F, there is no drop across R_F so V_OUT = V_INV = V_S. At high frequencies, the feedback capacitor C_F acts like a short. Compared to the low impedance of the C_F capacitor at high frequency, the feedback resistor is an open circuit. For the high frequency operation, the circuit looks the same as the R_ISO circuit. Thus, for a low frequency operation, the feedback resistor forces the output to be equal to the source voltage, and for a high frequency operation, the isolation resistance provides stability for the capacitive load.

Figure 4-14 AC and DC Operation of R_ISO-Dual-Feedback Configuration

R_ISO-Dual-Feedback design method illustrates the step-by-step method for choosing the components for the R_ISO-dual-feedback topology. First, select R_ISO using the same methods explained in R_ISO conservative design method or R_ISO design method for minimum R_ISO. Second, choose R_F to be at least 100 times larger than R_ISO. Setting R_F greater than R_ISO makes R_F effectively open in the AC case (see Figure 4-14). Finally, choose C_F according to Equation 31. Check the transient and AC response and adjust C_F within the bounds of the inequality given in Equation 32 to improve the response. The derivation of the inequality is covered in Equation 31 and Equation 32.

The values for Figure 4-15 were derived using R_ISO-Dual-Feedback design method and rounded to standard resistor and capacitor values. This example uses the same amplifier from Figure 4-5. The nominal value for C_F is 180pF from Equation 31. C_F can be adjusted from 90pF to 905pF according to Equation 32 to improve settling and overshoot. This circuit is used throughout this section for transient and open-loop discussions.

Figure 4-15 R_ISO-Dual-Feedback Configuration From Design Procedure

The design procedure in RISO-Dual-Feedback design method uses the inequality in Equation 32 to select the feedback capacitor. This inequality is used to prevent a resonance in the feedback network. To understand this potential resonance, splitting the feedback network into two paths using superposition is useful. Figure 4-16 and Figure 4-17 illustrate the two feedback paths. Each path constitutes a 1/β, and the combined 1/β is the minima of the two separate paths. The minima of the two paths are used to combine the two 1/β because the two 1/β are in parallel and the lowest impedance in parallel dominates.

The feedback path through R_F is separated from the overall feedback network by opening C_F (see FB1 in Figure 4-16). FB1 is a simple RC filter that generates a zero in 1/β1 (see Equation 33). The transfer function for 1/β1 approaches 0dB and low frequency and increases at 20dB per decade at high frequency. Equation 35 shows the zero frequency, where 1/β1 is +3dB. The feedback through C_F is separated from the overall feedback network by opening R_ISO (see FB2 in Figure 4-17). For this analysis we assume that the capacitive reactance of C_L is very low so that the reactance acts as a short. The transfer function of 1/β2 has both a pole and a zero (see Equation 34). The pole is located at 0Hz, so the function continuously rolls off at 20dB/decade for low frequency. At higher frequency, the pole is canceled by the zero, so 1/β2 flattens out at approximately 0dB. The zero frequency for FB2 is given in Equation 36. Figure 4-18 illustrates 1/β1, 1/β2, and the combined 1/β. Since both feedback paths contain complex numbers, the combined 1/β do not linearly add as there is some calculation in the complex addition. Notice that the combined 1/β shows a resonant peak where the two 1/β functions cross. This resonance can cause instability if the inequality in Equation 32 is not followed.

Figure 4-16 Superposition of Feedback Paths for 1/β (Feedback Through R_F)

Figure 4-17 Superposition of Feedback Paths for 1/β (Feedback Through C_F)

Figure 4-18 1/β for Both Feedback Paths and Combined 1/β

The resonance in 1/β occurs when the 3dB points on 1/β1 and 1/β2 are too close together. For example, if the 3dB point on 1/β2 is much lower than the 3dB point on 1/β1, then the two curves combine to form a relatively flat 1/β. Conversely, when the two 3dB points are close together, the two curves combine to form a resonant peak in 1/β (see Figure 4-19). This relationship between the cutoff frequencies determines the basis for the inequality (see Equation 37 through Equation 40 for derivation). Inspecting Figure 4-19, you can graphically see that f_CB1 > f_CB2 minimizes resonant peaking (see Equation 37 and Equation 38). To complete this derivation, remember that taking the reciprocal on both sides of the inequality flips the inequality sign for positive numbers (see Equation 39). Dividing by 2 × π × R_F yields Equation 40. Based on empirical results, C_F must be at least two times C_L × R_ISO / R_F to avoid instability due to the resonance. The factor of 10 for the maximum value of C_F was selected empirically to achieve a reasonable settling time. Technically, a larger factor can be used but then the settling is unnecessarily long.

Figure 4-19 Impact of 3dB Spacing on 1/β Curves for Resonant Peaking

The transient response of the circuit from Figure 4-15 is simulated in Figure 4-20 across the range of C_F from the design procedure. The target value of C_F from the procedure is 362pF, but the range allows for C_F from 90.5pF to 905pF. Figure 4-20 shows that the percentage overshoot is highest for the smallest capacitance, so if overshoot is a concern, choose a larger C_F value. Figure 4-21 illustrates the same transient response with the axis scaled to illustrate a 0.1% settling time. Since the output settles to 5mV, the axis is adjusted to 5mV ± 0.01mV for 0.1% settling. In general, the settling time increases for larger values of C_F. The exception to this trend happens for very low values of C_F, where the feedback is starting to become resonant (181pF in this case). Thus, overshoot decreases for larger values of C_F and settling time decreases. The recommended value of 362pF assumes the goal is for the shortest settling time while avoiding the resonance. See table Table 4-2 for a summary of settling time and overshoot versus C_F.

Figure 4-20 RISO-Dual-Feedback Transient Response

Figure 4-21 R_ISO-Dual-Feedback 0.1% Settling Transient Response

Figure 4-22 illustrates the open-loop response for Figure 4-15. The portion of the curve where 1/β1 and 1/β2 intersect is magnified and shown for different values of C_F. The phase response for different values of C_F is also shown. Note that the highest magnitude of resonant peaking and most dramatic phase shift occurs for the smallest feedback capacitor. Notice that the resonance occurs at a frequency below the point where A_OL intersects 1/β. Meaning, the resonance occurs below the point where phase margin is tested. This means that the resonance does not have a significant effect on phase margin. For circuits with very low C_F, the resonance can cause instability even though the phase margin is good. Table 4-2 shows the settling time, percentage overshoot, and phase margin across the range of C_F for Figure 4-15. Note that the phase margin looks good for all cases and shows no relationship to the percentage overshoot. This outcome is because phase shift from the resonance happens at a frequency below the phase margin test. Thus, instability due to the feedback resonance is not detected by the phase margin test. To avoid feedback resonance, adhere to the capacitance range in Equation 32 and inspect the 1/β curve for resonant peaking.

Figure 4-22 Open-Loop Dual-Feedback Response for Different C_F

Inspecting the transient response in Figure 4-21 shows that graphs with low values of C_F have a dampened sinusoidal oscillation, whereas graphs with low C_F have an initial overshoot and a long settling tail. This settling behavior depends on whether the poles in the closed-loop transfer function are real or complex conjugates. The transfer function for a system with complex conjugate poles is given in Equation 41 and the transient step response is given in Equation 42. Note that the transient step response for complex poles is an exponentially dampened sinusoidal function. The transfer function for a system with two real poles is given in Equation 43 and the transient step response is given in Equation 44. The transient step response for real poles contains two exponential functions with two different time constants. Normally, the exponential with the short time constant has a large coefficient that corresponds to the overshoot. The exponential with the short time constant has a coefficient that cancels the other exponential when settled (5-time constants). The combination of the two exponentials produces a large overshoot with a long settling tail. Thus, for the dual-feedback circuit, large values of C_F produce the smallest overshoot but have the longest settling tail (see Figure 4-23). From a practical perspective, the response with the dampened sinusoidal waveform is an indication of instability, whereas the single overshoot with a long settling tail indicates two real poles. The main concern with the system containing two real poles is that the long settling time limits the accuracy and speed of the system (see Demystifying pole-zero doublets).

Figure 4-23 Step Response for Complex Versus Real Poles