2 ADCs Voltage Reference Buffering Using OPAx328

A unity-gain (1-V/V) buffer with a large capacitive load is the most challenging configuration from a stability point of view for any op amp but this is exactly what is required for driving ADCs voltage references. To minimize the voltage droop during the conversion cycle of ADC, the reference pin requires a bypass of a very large capacitor. However, this together with the op-amp output impedance creates a pole within the op amp effective bandwidth that greatly degrades its phase margin. Since the bandwidth of any op amp is the highest in a buffer configuration, this leads to the maximum phase shift for a given capacitive load that may result in circuit instability. When operating in the unity-gain configuration, the OPAx328 remains stable with a pure capacitive load of up to 100 pF. However, the ADC voltage reference may require bypass cap more than five-orders of magnitude higher (up to 22uF) – thus, the circuit needs additional compensation.

One may easily solve the stability problem by adding a small equivalent resistance (ESR) in series with the bypass capacitor, C1, as shown in Figure 2-1. Including just 0.2-Ω ESR in series with a 22-μF capacitor forms a zero at 36.2 kHz $\left(f_Z = \frac{1}{2\pi \times 0.2\times 22\times {10}^{-6}}\right)$, which cancels a pole in AOL transfer function created at 160 Hz $\left(f_P = \frac{1}{2\pi \times 45.2\times 22\times {10}^{-6}} \right)$ and results in a recovery of phase margin to 79 degrees - this is higher than recommended minimum of 45 degrees.

Figure 2-1 Stability Analysis of Reference Buffering Using OPAx328

A small-signal transient simulation of the circuit driving 22-μF load in series with 0.2-Ω ESR shows overshoot of less than 25% and therefore confirms stable operation of the OPAx328 buffer, see Figure 2-2.

Figure 2-2 Transient Simulation of Reference Buffering Using OPAx328