SBOA542 November   2022 TMP1826 , TMP1827

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Bus Reset and Response
    2. 1.2 Host Write, Device Read
    3. 1.3 Host Read, Device Write
  4. 2Interfacing TMP1826 With the Host MCU
    1. 2.1 Using GPIO as Host Interface
    2. 2.2 Software Driver for GPIO
    3. 2.3 Using UART as Host Interface
    4. 2.4 Software Driver for UART
    5. 2.5 Using SPI as Host Interface
    6. 2.6 Software Driver for SPI
  5. 3Summary
  6. 4References

Software Driver for UART

This section describes the UART pseudocode. The following code shows a generic UART configuration for 8-N-1 format with a baud rate of 187,500bps.

void ConfigUART()
{
    // Configure UART for Baud Rate of 8-N-1 format and 125,000 bps
    UARTConfig(DATA_8_BIT, PARITY_NONE, STOP_ONE_BIT)
    UARTBaudRate(187500);
}

The following pseudocode shows how to implement bus reset and response. As the previous state of the bus communication can be write or read of data over the single-wire interface, TI's recommendation is that the baud rate be explicitly configured before bus reset and response is executed.

void mcu_txOneWireReset()
{
    // Configure UART for Baud Rate if 125,000 bps
    UARTBaudRate(187500);
    // Send Bus Reset on Transmit pin
    UARTSendData(0x00);
    // Wait for Response on Receive pin
    while(UARTGetData() != 0xFC);
    // Configure UART for Baud Rate if 500,000 bps
    UARTBaudRate(500000);
}

For the previously-described application example code, Figure 2-11 illustrates the bus transactions along with a UART reference frame. The host sends 0h00 for bus reset (indicated by marker 0) with a baud rate of 187.5kbps and the device responds to the reset (indicated by marker 1) with a response of 0hFC.

GUID-20220423-SS0I-ZTLH-LCDW-2GDHJ9BZ8SDR-low.jpg Figure 2-11 Scope Capture of Bus Reset and Response

Once the bus reset is sent and the response received, the host then sends the address command and function command to the device. As all commands and data transfers are at byte boundary, the pseudocode shows how to send the bytes and bits to the device.

void mcu_txOneWireByte(uint8_t bytevalue)
{
    uint8_t count;
    // Shift bits LSB to MSB
    for(count=0; count<8; count++)
    {
        mcu_txOneWireBit((bytevalue >> count) & 0x01);
    }
}

void mcu_txOneWireBit(uint8_t bitvalue)
{
    // If logic '0' then send 0xF0
    if(bitvalue == 0x00)
    {
        UARTSendData(0xC0);
    }
    // If logic '1' then send 0xFF
    else if(bitvalue == 0x01)
    {
        UARTSendData(0xFF);
    }
}

Figure 2-12 shows the write byte transfer of address command 0hCC (SKIPADDR) and function command 0h44 (CONVERTTEMP) for temperature conversion. During the write operation, the UART.TX is set as 0hF0 and 0hFF to indicated a logic '0' and logic '1', respectively. Because the device is always in receive state, the device does not respond on the SDQ pin and hence the UART.RX pin mirrors the UART.TX pin.

GUID-20220423-SS0I-PCXN-38JH-CWGNHTRJSLL6-low.jpg Figure 2-12 Scope Capture of Write Transfer

The following pseudocode shows how to implement read from the device after sending an address or function command to which the device responds. As with data transfer to the device, whenever data is read back from the device, the read is done at byte boundary. The following function shows how to implement both the byte and bit read functions.

uint8_t mcu_rxOneWireByte(void)
{
    uint8_t count;
    uint8_t rxbyte = 0x00;
    // Shift bits LSB to MSB
    for(count=0; count<8; count++)
    {
        rxbyte |= (mcu_rxOneWireBit() << count);
    }
}

uint8_t mcu_rxOneWireBit(void)
{
    uint8_t rcvbyte;

    // Send the Falling edge to begin the read
    UARTSendData(0xFF);
    // Get the data from Receive pin
    rcvbyte = UARTGetData();

    if(rcvbyte == 0xFF || rcvbyte == 0xFE)
    {
        return(1);
    }
    else
    {
        return(0);
    }
}

Figure 2-13 shows the write of the function command 0hBE (READ SCRATCHPAD-1) and the read byte that follows. The host during the read operation drives UART.TX as 0hFF. As indicated by marker 2, if the device has a logic '1' to send to the host, the device does not drive the SDQ pin and the byte received by UART.RX is 0hFF. When the device has a logic '0' to send to the host, the device drives the SDQ pin low as shown by marker pair 3. The UART.RX of the host pin, in this case receives a 0hF8 or 0hFC.

GUID-20220423-SS0I-X9CC-9BPS-QWTJDTJ7P5TW-low.jpg Figure 2-13 Scope Capture of Read Transfer