SBOA542 November   2022 TMP1826 , TMP1827

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Bus Reset and Response
    2. 1.2 Host Write, Device Read
    3. 1.3 Host Read, Device Write
  4. 2Interfacing TMP1826 With the Host MCU
    1. 2.1 Using GPIO as Host Interface
    2. 2.2 Software Driver for GPIO
    3. 2.3 Using UART as Host Interface
    4. 2.4 Software Driver for UART
    5. 2.5 Using SPI as Host Interface
    6. 2.6 Software Driver for SPI
  5. 3Summary
  6. 4References

2.5 Using SPI as Host Interface

The Serial Peripheral Interface (SPI) is another common peripheral found on most MCUs. SPI is a full- or half-duplex synchronous interface generally reserved for high-speed data transfers. The transmit function is a push-pull pin while the receive function is an input function. Similar to the UART implementation, Figure 2-14 shows a method to reconfigure the interface to function as a single-wire interface.

Figure 2-14 SPI for TMP1826

Depending on the implementation, the SPI bus can have variable data lengths from 4 bits to 32 bits along with a serial clock pin. Additionally, clock (CPOL) and data (CPHA) polarity are used to defined the mode of operation. For interfacing the SPI peripheral from a host MCU to the single-wire bus, use an 8-bit data length and mode-1 (CPOL = 0, CPHA = 1) of operation. Similar to UART bus, Table 2-2 provides the reference clock rates required by bus reset and data bits for standard and overdrive bus speed.

Table 2-2 SPI Clock Rate to Single-Wire Bus Speed
SPI Clock for Single-Wire Standard Speed SPI Clock for Single-Wire Overdrive Speed
Bus Reset Data Bit Bus Reset Data Bit
16000 Hz 125000 Hz 100500 Hz 500000 Hz