SBAA517 June   2021

 

  1.   Trademarks
  2. 1Introduction
  3. 2Background
  4. 3What’s New in JESD204C
  5. 4Summary
  6. 5References

Introduction

The JESD204 interface standard was born out of the need to develop a common method for serializing data-converter digital data and reduce the number of interconnects between mixed-signal devices and a processing element such as a field-programmable gate array (FPGA). The standard has gone through several iterations – the B version being one of the most recognized and employed by device developers. The current version is starting to lose steam, however, given the requirements for even faster data converters. New device releases such as the Texas Instrument's ADC12DJ5200RF are breaking the 10-GSPS barrier and are adopting the C standard to keep up with the required throughput.

JESD204 may seem complicated for those that have read the JEDEC documents, but the standard was designed to manage the fantastic amounts of data being provided by modern mixed-signal devices such as analog-to-digital converters (ADC), digital-to-analog converters (DAC) and analog front ends. For those new to the standard, more information is available on the Texas Instruments training portal.