ZHCSRG0A December   2022  – February 2024 UCC5880-Q1

PRODUCTION DATA  

  1.   1
  2. 1特性
  3. 2应用
  4. 3说明
  5. 4Pin Configuration and Functions
  6. 5Power Supply Recommendations
    1. 5.1 VCC1
    2. 5.2 VCC2
    3. 5.3 VEE2
  7. 6Layout
    1. 6.1 Layout Guidelines
      1. 6.1.1 Component Placement
      2. 6.1.2 Grounding Considerations
      3. 6.1.3 High-Voltage Considerations
      4. 6.1.4 Thermal Considerations
    2. 6.2 Layout Example
  8. 7Device and Documentation Support
    1. 7.1 Device Support
      1. 7.1.1 第三方产品免责声明
    2. 7.2 接收文档更新通知
    3. 7.3 支持资源
    4. 7.4 Trademarks
    5. 7.5 静电放电警告
    6. 7.6 术语表
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DFC|32
散热焊盘机械数据 (封装 | 引脚)
订购信息

5.3 VEE2

VEE2 operates with an input range of -12V to 0V, allowing a negative gate bias on the power FET during turn-off in both IGBT and SiC applications. This prevents the power FET from unintentionally turning on due to current inducted from the Miller effect. For operation with a unipolar supply, connect VEE2 to GND2. VEE2 is monitored with both an undervoltage and overvoltage comparator circuit to ensure valid operation. UV and OV conditions of VEE2 are recorded in FAULT2[UVLO3_FAULT] andFAULT2[OVLO3_FAULT], respectively.