ZHCSHY7A April   2018  – May 2018 UCC28742

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化原理图
      2.      10W、5V 交流/直流转换器的典型效率
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Detailed Pin Description
        1. 7.3.1.1 VDD (Device Bias Voltage Supply)
        2. 7.3.1.2 GND (Ground)
        3. 7.3.1.3 VS (Voltage-Sense)
        4. 7.3.1.4 DRV (Gate Drive)
        5. 7.3.1.5 CS (Current Sense)
        6. 7.3.1.6 FB (Feedback)
      2. 7.3.2 Secondary-Side Optically Coupled Constant-Voltage (CV) Regulation
      3. 7.3.3 Control Law
      4. 7.3.4 Constant Current Limit and Delayed Shutdown
      5. 7.3.5 Valley-Switching and Valley-Skipping
      6. 7.3.6 Start-Up Operation
      7. 7.3.7 Fault Protection
    4. 7.4 Device Functional Modes
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  VDD Capacitance, CDD
        3. 8.2.2.3  VDD Start-Up Resistance, RSTR
        4. 8.2.2.4  Input Bulk Capacitance and Minimum Bulk Voltage
        5. 8.2.2.5  Transformer Turns Ratio, Inductance, Primary-Peak Current
        6. 8.2.2.6  Transformer Parameter Verification
        7. 8.2.2.7  VS Resistor Divider and Line Compensation
        8. 8.2.2.8  Standby Power Estimate
        9. 8.2.2.9  Output Capacitance
        10. 8.2.2.10 Feedback Loop Design Consideration
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 开发支持
        1. 11.1.1.1 使用 WEBENCH® 工具创建定制设计
      2. 11.1.2 器件命名规则
        1. 11.1.2.1  电容术语（以法拉为单位）
        2. 11.1.2.2  占空比术语
        3. 11.1.2.3  频率术语（以赫兹为单位）
        4. 11.1.2.4  电流术语（以安培为单位）
        5. 11.1.2.5  电流和电压调节术语
        6. 11.1.2.6  变压器术语
        7. 11.1.2.7  功率术语（以瓦特为单位）
        8. 11.1.2.8  电阻术语（以 Ω 为单位）
        9. 11.1.2.9  时序术语（以秒为单位）
        10. 11.1.2.10 电压术语（以伏特为单位）
        11. 11.1.2.11 交流电压术语（以 VRMS 为单位）
        12. 11.1.2.12 效率术语
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 接收文档更新通知
    4. 11.4 社区资源
    5. 11.5 商标
    6. 11.6 静电放电警告
    7. 11.7 术语表
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.5 Electrical Characteristics

Over operating free-air temperature range, VVDD = 25 V, VFB = 0 V, VVS = 4V, –40°C ≤ TA ≤ 125°C, TJ = TA (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BIAS SUPPLY INPUT
IRUN Supply current, run IDRV = 0, run state 1.30 1.80 2.40 mA
IWAIT Supply current, wait IDRV = 0, VVDD = 20 V, wait state 50 80 115 µA
ISTART Supply current, start IDRV = 0, VVDD = 17 V, start state 1.50 2.75 µA
IFAULT Supply current, fault IDRV = 0, fault state 1.30 1.80 2.40 mA
UNDER-VOLTAGE LOCKOUT
VVDD(on) VDD turn-on threshold VVDD low to high 17.5 21.6 24.5 V
VVDD(off) VDD turn-off threshold VVDD high to low 7.25 7.80 8.30 V
VS INPUT
VVSNC Negative clamp level IVS = –300 µA –304 –225 –164 mV
IVSB Input bias current VVS = 4 V –0.25 0 0.25 µA
FB INPUT
IFBMAX Full-range input current fSW = fSW(min) 16 23 30 µA
VFBMAX Input voltage at full-range IFB = 26 µA 0.70 0.90 1.10 V
RFB FB-input resistance ΔIFB = 6 to 26 µA 10 14 18 kΩ
CS INPUT
VCST(max) Max CS threshold voltage (3) IFB = 0 µA 710 770 830 mV
VCST(min) Min CS threshold voltage (3) IFB = 35 µA 164 190 216 mV
KAM AM control ratio VCST(max) / VCST(min) 3.55 4.00 4.50 V/V
VCCR Constant-current regulating level 338 363 390 mV
KLC Line compensating current ratio,  IVSLS / (current out of CS pin) IVSLS = –300 µA 23 25 29 A/A
TCSLEB Leading-edge blanking time DRV output duration, VCS = 1 V 195 270 350 ns
DRV
IDRS DRV source current VDRV = 5 V, VVDD = 9 V 24 30 36 mA
RDRVLS DRV low-side drive resistance IDRV = 10 mA 6.5 12 Ω
VDRCL DRV clamp voltage VVDD = 35 V 8.8 10.6 13 V
RDRVSS DRV pull-down in start state 135 175 250 kΩ
TIMING
fSW(max) Maximum switching frequency (4) IFB = 0 µA 80 105 130 kHz
fSW(min) Minimum switching frequency IFB = 35 µA 140 200 255 Hz
tZTO Zero-crossing timeout delay 1.45 2.45 3.30 µs
tOVL_TIME Delay time before shutdown Demag_Duty = VCCR/ VCST(max) 85 120 160 ms
PROTECTION
VOVP Over-voltage threshold(1) At VS input, TJ = 25 °C 4.45 4.65 4.85 V
VOCP Over-current threshold(1) At CS input 1.41 1.50 1.59 V
IVSL(run) VS line-sense run current Current out of VS pin – increasing 170 210 250 µA
IVSL(stop) VS line-sense stop current Current out of VS pin – decreasing 60 75 90 µA
KVSL VS pin, line-sense current ratio,  IVSL(run) / IVSL(stop) 2.50 2.80 3.05 A/A
TJ(stop) Thermal shut-down temperature (2) Internal junction temperature 165 °C
(1) The OVP threshold at VS decrease with increasing temperature by 1 mV/℃. This compensation over temperature is included to reduce the variances in power supply over-voltage detection with respect to the external output rectifier.
(2) Ensured by design. Not tested in production.
(3) These threshold voltages represent average levels. This device automatically varies the current sense threshold to improve EMI performance.
(4) These frequency limits represent average levels. This device automatically varies the switching frequency to improve EMI performance.