ZHCSBL3C June   2013  – May 2017 TPS65150-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Boost Converter
        1. 7.3.1.1 Setting the Boost Converter Output Voltage
        2. 7.3.1.2 Boost Converter Rectifier Diode
        3. 7.3.1.3 Choosing the Boost Converter Output Capacitance
        4. 7.3.1.4 Compensation
        5. 7.3.1.5 Soft Start
        6. 7.3.1.6 Gate Drive Signal
      2. 7.3.2 Negative Charge Pump
        1. 7.3.2.1 Negative Charge Pump Output Voltage
        2. 7.3.2.2 Negative Charge Pump Flying Capacitance
        3. 7.3.2.3 Negative Charge Pump Output Capacitance
        4. 7.3.2.4 Negative Charge Pump Diodes
      3. 7.3.3 Positive Charge Pump
        1. 7.3.3.1 Positive Charge Pump Output Voltage
        2. 7.3.3.2 Positive Charge Pump Flying Capacitance
        3. 7.3.3.3 Positive Charge Pump Output Capacitance
        4. 7.3.3.4 Positive Charge Pump Diodes
      4. 7.3.4 Power-On Sequencing, DLY1, DLY2
      5. 7.3.5 Gate Voltage Shaping
      6. 7.3.6 VCOM Buffer
      7. 7.3.7 Protection
        1. 7.3.7.1 Boost Converter Overvoltage Protection
        2. 7.3.7.2 Adjustable Fault Delay
        3. 7.3.7.3 Thermal Shutdown
        4. 7.3.7.4 Undervoltage Lockout
    4. 7.4 Device Functional Modes
      1. 7.4.1 VI > VIT+
      2. 7.4.2 VI < VIT-
      3. 7.4.3 Fault Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Boost Converter Design Procedure
          1. 8.2.2.1.1 Inductor Selection
        2. 8.2.2.2  Rectifier Diode Selection
        3. 8.2.2.3  Setting the Output Voltage
        4. 8.2.2.4  Output Capacitor Selection
        5. 8.2.2.5  Input Capacitor Selection
        6. 8.2.2.6  Compensation
        7. 8.2.2.7  Negative Charge Pump
          1. 8.2.2.7.1 Choosing the Output Capacitance
          2. 8.2.2.7.2 Choosing the Flying Capacitance
          3. 8.2.2.7.3 Choosing the Feedback Resistors
          4. 8.2.2.7.4 Choosing the Diodes
        8. 8.2.2.8  Positive Charge Pump
          1. 8.2.2.8.1 Choosing the Flying Capacitance
          2. 8.2.2.8.2 Choosing the Output Capacitance
          3. 8.2.2.8.3 Choosing the Feedback Resistors
          4. 8.2.2.8.4 Choosing the Diodes
        9. 8.2.2.9  Gate Voltage Shaping
        10. 8.2.2.10 Power-On Sequencing
        11. 8.2.2.11 Fault Delay
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Specifications

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
Voltages on pin VIN, CTRL –0.3 7 V
ADJ –0.3 22 V
VCOM, IN, DRVP, DRVN –0.3 15 V
FBN, COMP, FBP, FB, DLY1, DLY2 –0.3 5.5 V
REF –0.3 4 V
VGH –0.3 30 V
FDLY –0.3 6 V
GD, SUP –0.3 15.5 V
SW –0.3 20 V
CPI –0.3 32 V
Operating junction temperature, TJ –40 125 °C
Storage temperature, Tstg –65 150 °C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.

ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC-Q100-02 ±2000 V
Charged-device model (CDM), per AEC-Q100-011 ±500

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VI Input voltage range 1.8 6 V
V(VS) Output voltage range of the boost converter V(VS) 15 V
L Inductor(1) 4.7 µH
TA Operating ambient temperature –40 125 °C
See Typical Application for further information.

Thermal Information

THERMAL METRIC(1) TPS65150-Q1 UNIT
PWP (TSSOP)
24 PINS
RθJA Junction-to-ambient thermal resistance 40.6 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 20.8 °C/W
RθJB Junction-to-board thermal resistance 18.4 °C/W
ψJT Junction-to-top characterization parameter 0.5 °C/W
ψJB Junction-to-board characterization parameter 18.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 1.9 °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

Electrical Characteristics

VI = 3.3 V, V(VS) = 10 V, TA = –40°C to 125°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
VI Input voltage (VIN) 1.8 6 V
Supply current (VIN) Device not switching 14 25 µA
Supply current (SUP) Device not switching 1.9 3 mA
Supply current (VCOM buffer) 750 1500 µA
VIT– Undervoltage lockout threshold (VIN) VI falling –40 °C < TA < 85 °C 1.6 1.8 V
–40 °C < TA < 125 °C 1.6 1.85
VIT+ Undervoltage lockout threshold (VIN) VI rising –40 °C < TA < 85 °C 1.7 1.9 V
–40 °C < TA < 125 °C 1.7 1.95
Thermal shutdown temperature threshold TJ rising 155 °C
Thermal shutdown temperature hysteresis 10 °C
LOGIC SIGNALS
VIH High-level input voltage (CTRL) 1.6 V
VIL Low-level input voltage (CTRL) 0.4 V
IIH, IIL Input current (CTRL) CTRL = VI or GND 0.01 0.2 µA
BOOST CONVERTER
VO Output voltage 15 V
Vref Boost converter reference voltage (FB) –40 °C < TA < 85 °C 1.136 1.146 1.154 V
–40 °C < TA < 125 °C 1.132 1.146 1.160
IIB Input bias current (FB) 10 100 nA
rDS(on) Drain-source on-state resistance (Q1) IDS = 500 mA VO = 10 V 200 300
VO = 5 V 305 450
rDS(on) Drain-source on-state resistance (Q2) IDS = 500 mA VO = 10 V 8 15 Ω
VO = 5 V 12 22
IDS Drain-source current rating (Q2) 1 A
Current limit (Q1) 2 2.5 3.4 A
I(SW)(off) Off-state current (SW) V(SW) = 15 V 1 10 µA
VIT+ Overvoltage protection threshold (SUP) V(SUP) rising 16 20 V
ΔVO(ΔVI) Line regulation VI = 1.8 V to 5 V IO = 1 mA 0.007 %/V
ΔVO(ΔIO) Load regulation VI = 5 V IO = 0 A to 400 mA 0.16 %/A
VIT+ Gate drive threshold (FB)(2) –12% of Vref –4% of Vref V
NEGATIVE CHARGE PUMP
VO Output voltage –2 V
V(REF) Reference output voltage (REF) –40 °C < TA < 85 °C 1.205 1.213 1.219 V
–40 °C < TA < 125 °C 1.203 1.213 1.223
Vref Feedback regulation voltage (FBN) –36 0 36 mV
IIB Input bias current (FBN) 10 100 nA
rDS(on) Drain-source on-state resistance (Q4) IDS = 20 mA 4.4 Ω
V(DRVN) Current sink voltage drop(1) V(FBN) = 5% above nominal voltage I(DRVN) = 50 mA 130 300 mV
I(DRVN) = 100 mA 280 450
ΔVO(ΔIO) Load regulation VO = –5 V IO = 0 mA to 20 mA 0.016 %/mA
POSITIVE CHARGE PUMP
VO Output voltage CTRL = GND VGH = open 30 V
Vref Feedback regulation voltage (FBP) CTRL = GND VGH = open 1.187 1.214 1.238 V
IIB Input bias current (FBP) CTRL = GND VGH = open 10 100 nA
rDS(on) Drain-source on-state resistance (Q3) IDS = 20 mA 1.1 Ω
V(SUP) – V(DRVP) Current sink voltage drop(1) V(FBP) = 5% below nominal voltage I(DRVP) = 50 mA 420 650 mV
I(DRVP)= 100 mA 900 1400
ΔVO(ΔIO) Load regulation VO = 24 V IO = 0 mA to 20 mA 0.07 %/mA
GATE-VOLTAGE SHAPING
rDS(on) Drain-source on-state resistance (Q5) IO = –20 mA 12 30 Ω
I(ADJ) Capacitor charge current V(ADJ) = 20 V V(CPI) = 30 V 160 200 240 µA
VOmin Minimum output voltage V(ADJ) = 0 V IO = –10 mA 2 V
IOM Maximum output current 20 mA
TIMING CIRCUITS DLY1, DLY2, FDLY
I(DLY1) Drive current into delay capacitor (DLY1) V(DLY1) = 1.213 V 3 5 7 µA
I(DLY2) Drive current into delay capacitor (DLY2) V(DLY2) = 1.213 V 3 5 7 µA
R(FDLY) Fault time delay resistor 250 450 650
GATE DRIVE (GD)
V(GD_VS) Gate Drive Threshold V(VS) rising –12% of V(SUP) –4% of V(SUP)
VOL Low-level output voltage (GD) IOL = 500 µA 0.5 V
IOH Off-state current (GD) VOH = 15 V 0.001 1 µA
VCOM BUFFER
VISR Single-ended input voltage (IN) 2.25 V(SUP) – 2 V V
VIO Input offset voltage (IN) IO = 0 mA –25 25 mV
ΔVO(ΔIO) Load regulation IO = ±25 mA –37 37 mV
IO = ±50 mA –77 55
IO = ±100 mA –85 85
IO = ±150 mA –110 110
IIB Input bias current (IN) –300 –30 300 nA
IOM Maximum output current (VCOM) V(SUP) = 15 V 1.2 A
V(SUP) = 10 V 0.65
V(SUP) = 5 V 0.15
The maximum charge pump output current is half the drive current of the internal current source or sink.
The GD signal is latched low when the main boost converter output is within regulation. The GD signal is reset when the voltage on the VIN pin goes below the UVLO threshold voltage.

Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Oscillator frequency 1.02 1.2 1.38 MHz
Duty cycle (DRVN) 50%
Duty cycle (DRVP) 50%

Typical Characteristics

The typical characteristics are measured at 3.3 V

Table 1. Table Of Graphs

FIGURE
Boost converter switch (Q1) current limit vs temperature Figure 1
Boost converter switch (Q1) rDS(on) vs temperature Figure 2
Boost converter rectifier (Q2) rDS(on) vs temperature Figure 3
Boost converter reference Voltage vs temperature Figure 4
Positive charge pump reference voltage vs temperature Figure 5
REF pin voltage vs temperature Figure 6
Oscillator frequency vs temperature Figure 7
TPS65150-Q1 TypChar_01_SLVS576.png
Figure 1. Boost Converter Switch (Q1) Current Limit vs Temperature
TPS65150-Q1 TypChar_02_SLVS576.png
Figure 2. Boost Converter Switch (Q1) rDS(on) vs Temperature
TPS65150-Q1 TypChar_03_SLVS576.png
Figure 3. Boost Converter Rectifier (Q2) rDS(on) vs Temperature
TPS65150-Q1 TypChar_05_SLVS576.png
Figure 5. Positive Charge Pump Reference Voltage vs Temperature
TPS65150-Q1 TypChar_07_SLVS576.png
Figure 7. Oscillator Frequency vs Temperature
TPS65150-Q1 TypChar_04_SLVS576.png
Figure 4. Boost Converter Reference Voltage vs Temperature
TPS65150-Q1 TypChar_06_SLVS576.png
Figure 6. REF Pin Voltage vs Temperature