ZHCSKG6 November   2019 TPS61391

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      典型应用电路
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Recommended Operating Conditions
    2. 6.2 Absolute Maximum Ratings
    3. 6.3 ESD Ratings
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout
      2. 7.3.2 Enable and Disable
      3. 7.3.3 Current Mirror
      4. 7.3.4 High Optical Power Protection
    4. 7.4 Device Functional Mode
      1. 7.4.1 PFM Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirement
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Selecting the Rectifier Diode
        2. 8.2.2.2  Selecting the Inductor
        3. 8.2.2.3  Selecting Output Capacitor
        4. 8.2.2.4  Selecting Filter Resistor and Capacitor
        5. 8.2.2.5  Setting the Output Voltage
        6. 8.2.2.6  Selecting Capacitor for CAP pin
        7. 8.2.2.7  Selecting Capacitor for AVCC pin
        8. 8.2.2.8  Selecting Capacitor for APD pin
        9. 8.2.2.9  Selecting the Resistors of MON1 or MON2
        10. 8.2.2.10 Selecting the Capacitors of MON1 or MON2
        11. 8.2.2.11 Selecting the Short Current Limit
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.1 Overview

The TPS61391 is a fully integrated boost converter with an 85-V FET to convert a low input voltage to a higher voltage for biasing the APD. The TPS61391 supports an input voltage ranging from 2.5 V to 5.5 V. The device operates at a 700 kHz pulse-width modulation (PWM) crossing the whole load range.

There are two ratio options for the current proportional to APD current: the MON1 (4 : 5) and MON2 (1 : 5). By connecting a resistor from the mirror output (MON1 or MON2) to GND, the current flowing through the APD is converted into the voltage crossing the resistor from MON1 / MON2 to GND.

Additionally, a high power optical protection is integrated by clamping the pre-set current limit (program by the ISHORT resistor). The response time of the high optical power is typically 0.5 µs. The device could recovery automatically when the high optical power is removed.

The device comes in a 3-mm × 3-mm QFN package with the operating junction temperature covering from –40°C to 125°C.