SLUSA41B JUNE   2010  – September 2016 TPS53311

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Soft Start
      2. 7.3.2 Power Good
      3. 7.3.3 Undervoltage Lockout (UVLO) Function
      4. 7.3.4 Overcurrent Protection
      5. 7.3.5 Overvoltage Protection
      6. 7.3.6 Undervoltage Protection
      7. 7.3.7 Overtemperature Protection
      8. 7.3.8 Output Discharge
      9. 7.3.9 Master and Slave Operation and Synchronization
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation Mode
      2. 7.4.2 Light Load Operation
      3. 7.4.3 Forced Continuous Conduction Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Determine the Value of R1 and R2
        2. 8.2.2.2 Choose the Inductor
        3. 8.2.2.3 Choose the Output Capacitor(s)
        4. 8.2.2.4 Choose the Input Capacitor
        5. 8.2.2.5 Compensation Design
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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4 Revision History

Changes from A Revision (March 2011) to B Revision

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo
  • Deleted Ordering Information table; see POA at the end of the data sheetGo
  • Added Thermal Information tableGo
  • Deleted Package Dissipation Ratings tableGo
  • Changed value of component R2 in Typical Application Circuit Diagram From: 4.02 kΩ To: 2.67 kΩGo
  • Changed value of component VOUT on TPS53311 Master in Master and Slave Configuration Schematic From: 1.2 V To: 1.5 VGo
  • Changed value of component R2 on TPS53311 Master in Master and Slave Configuration Schematic From: 4.02 kΩ To: 2.67 kΩGo
  • Changed value of component VOUT on TPS53311 Slave in Master and Slave Configuration Schematic From: 1.5 V To: 1.2 VGo
  • Changed value of component R12 on TPS53311 Slave in Master and Slave Configuration Schematic From: 2.67 kΩ To: 4.02 kΩGo

Changes from * Revision (June 2010) to A Revision

  • Added bullets to FeaturesGo
  • Changed Description for clarityGo
  • Changed Absolute Maximum Ratings output voltage (SW pin DC) minimum from 0.3 V to –1 V (typographical error)Go
  • Added information regarding DE mode in Master/Slave Operation and Synchronization sectionGo
  • Changed value of component C2 in Typical Application Circuit Diagram to 2.2 nF (typographical error)Go
  • Changed component labels and values in Master/Slave Configuration Schematic (typographical error)Go