ZHCSB50K December   2012  – May 2019 TPS50301-HT

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      效率与负载电流间的关系 (VIN = 5 V)
  4. 4 修订历史记录
  5. 5 说明 （续）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Dissipation Ratings
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  VIN and Power VIN Pins (VIN and PVIN)
      2. 8.3.2  PVIN vs Frequency
      3. 8.3.3  Voltage Reference
      4. 8.3.4  Adjusting the Output Voltage
      5. 8.3.5  Maximum Duty Cycle Limit
      6. 8.3.6  PVIN vs Frequency
      7. 8.3.7  Safe Start-Up into Prebiased Outputs
      8. 8.3.8  Error Amplifier
      9. 8.3.9  Slope Compensation
      10. 8.3.10 Enable and Adjust UVLO
      11. 8.3.11 Adjustable Switching Frequency and Synchronization (SYNC)
      12. 8.3.12 Slow Start (SS/TR)
      13. 8.3.13 Power Good (PWRGD)
      14. 8.3.14 Bootstrap Voltage (BOOT) and Low Dropout Operation
      15. 8.3.15 Sequencing (SS/TR)
      16. 8.3.16 Output Overvoltage Protection (OVP)
      17. 8.3.17 Overcurrent Protection
        1. 8.3.17.1 High-Side MOSFET Overcurrent Protection
        2. 8.3.17.2 Low-Side MOSFET Overcurrent Protection
      18. 8.3.18 TPS50301-HT Thermal Shutdown
      19. 8.3.19 Turn-On Behavior
      20. 8.3.20 Small Signal Model for Loop Response
      21. 8.3.21 Simple Small Signal Model for Peak Current Mode Control
      22. 8.3.22 Small Signal Model for Frequency Compensation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Fixed-Frequency PWM Control
      2. 8.4.2 Continuous Current Mode (CCM) Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Custom Design With WEBENCH® Tools
        2. 9.2.2.2  Operating Frequency
        3. 9.2.2.3  Output Inductor Selection
        4. 9.2.2.4  Output Capacitor Selection
        5. 9.2.2.5  Input Capacitor Selection
        6. 9.2.2.6  Slow Start Capacitor Selection
        7. 9.2.2.7  Bootstrap Capacitor Selection
        8. 9.2.2.8  Undervoltage Lockout (UVLO) Set Point
        9. 9.2.2.9  Output Voltage Feedback Resistor Selection
          1. 9.2.2.9.1 Minimum Output Voltage
        10. 9.2.2.10 Compensation Component Selection
      3. 9.2.3 Parallel Operation
      4. 9.2.4 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 器件支持
      1. 12.1.1 开发支持
        1. 12.1.1.1 使用 WEBENCH® 工具创建定制设计
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息
    1. 13.1 器件命名规则

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.3.10 Enable and Adjust UVLO

The EN pin provides electrical on and off control of the device. When the EN pin voltage exceeds the threshold voltage, the device starts operation. If the EN pin voltage is pulled below the threshold voltage, the regulator stops switching and enters low Iq state. If an external Schottky diode is used from VIN to boot, then a bleeder may be required < 1 mA to ensure output is low when the unit is disabled by EN pin.

The EN pin has an internal pullup current source, allowing the user to float the EN pin for enabling the device. If an application requires controlling the EN pin, use open-drain or open-collector output logic to interface with the pin.

The device implements internal UVLO circuitry on the VIN pin. The device is disabled when the VIN pin voltage falls below the internal VIN UVLO threshold. The internal VIN UVLO threshold has a hysteresis of 50-mV typical.

If an application requires either a higher UVLO threshold on the VIN pin or a secondary UVLO on the PVIN in split-rail applications, then the EN pin can be configured as shown in Figure 18, Figure 19, and Figure 20.

The EN pin has a small pullup current, Ip, which sets the default state of the pin to enable when no external components are connected. The pullup current is also used to control the voltage hysteresis for the UVLO function because it increases by Ih after the EN pin crosses the enable threshold. Calculate the UVLO thresholds with Equation 4 and Equation 5.

TPS50301-HT adj_vin_lvsa94.gifFigure 18. Adjustable VIN UVLO
TPS50301-HT adj_combo_lvsa94.gifFigure 20. Adjustable VIN and PVIN UVLO
TPS50301-HT adj_pvin_lvsa94.gifFigure 19. Adjustable PVIN UVLO, VIN ≥ 3 V
Equation 4. TPS50301-HT eq1_r1_lvs949.gif
Equation 5. TPS50301-HT eq2_r2_lvs949.gif

where

  • Ih = 3 μA
  • Ip = 3.2 μA
  • VENRISING = 1.131 V
  • VENFALLING = 1.09 V