SBVS085J January   2007  – June 2017

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Immunity to SENSE Pin Voltage Transients
      2. 8.3.2 SENSE Input
      3. 8.3.3 Manual Reset (MR) Input
      4. 8.3.4 Selecting the Reset Delay Time
    4. 8.4 Device Functional Modes
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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Applications and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

Application Information

The TPS3808Gxx-Q1 microprocessor supervisory product family is designed to assert a RESET signal when either the SENSE pin voltage drops below VIT or the manual reset (MR) is driven low. The RESET output remains asserted for a user-adjustable time after both the manual reset (MR) and SENSE voltages return above the respective thresholds. A broad range of voltage threshold and reset delay time adjustments are available, allowing these devices to be used in a variety of applications. Reset threshold voltages can be factory-set from 0.82 V to 3.3 V or from 4.4 V to 5 V, while the TPS3808G01-Q1 can be set to any voltage above 0.405 V using an external resistor divider. Two preset delay times are also user-selectable: connecting the CT pin to VDD results in a 300-ms reset delay, while leaving the CT pin open yields a 20-ms reset delay. Additionally, connecting a capacitor between CT and GND allows the designer to select any reset delay period from 1.25 ms to 10 s.

Typical Application

TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1 TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1 Typical_Application_1_sbvs085.gif Figure 14. TPS3808G33-Q1 Typical Application
TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1 TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1 Typical_Application_2_sbvs085.gif Figure 15. TPS3808G01-Q1 Typical Application

Design Requirements

The TPS3808Gxx-Q1 device must monitor a 3.3-V input voltage, and drive an active-low reset to the processor when the input voltage drops below the recommended operating voltage of the processor.

Detailed Design Procedure

To monitor the 3.3-V input voltage, TPS3808G33-Q1 is used and the 3.3-V supply is connected directly to the SENSE pin. The open-drain RESET output is connected to VDD through a 50-kΩ resistor. To select the output delay on the RESET pin, connect the CT pin to VDD, left floating, or connect through a capacitor to GND. For more details on selecting this delay, see Selecting the Reset Delay Time.

When using TPS3808G01-Q1, select R1 and R2 resistor values to select the threshold voltage based on the following equation: VIT = (1 + R1 / R2) × 0.405.

Application Curves

TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1 TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1 ld_reg_bvs085.gif
Figure 16. Supply Current vs Supply Voltage
TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1 TPS3808G18-Q1 TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1 vdo_v_io_bvs085.gif
Figure 17. RESET Time-out Period vs CT