SPAS093C December   2009  – September 2015 TPS2505

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics (Shared Boost, LDO and USB)
    6. 6.6  Electrical Characteristics (Boost Only)
    7. 6.7  Electrical Characteristics (USB1/2 Only)
    8. 6.8  Electrical Characteristics (LDO and Reset Only)
    9. 6.9  Recommended External Components
    10. 6.10 Dissipation Ratings
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  PGND
      2. 8.3.2  IN
      3. 8.3.3  EN
      4. 8.3.4  GND
      5. 8.3.5  ILIM1/2
      6. 8.3.6  RESET
      7. 8.3.7  LDOOUT
      8. 8.3.8  LDOIN
      9. 8.3.9  ENLDO
      10. 8.3.10 FAULT1/2
      11. 8.3.11 ENUSB1/2
      12. 8.3.12 USB1/2
      13. 8.3.13 AUX
      14. 8.3.14 SW
      15. 8.3.15 Thermal Pad
      16. 8.3.16 Boost Converter
        1. 8.3.16.1 Start-Up
        2. 8.3.16.2 Normal Operation
        3. 8.3.16.3 Low-Frequency Mode
        4. 8.3.16.4 No-Frequency Mode
        5. 8.3.16.5 Pulsed Frequency Mode (PFM) Light-Load Operation
        6. 8.3.16.6 Overvoltage Protection
        7. 8.3.16.7 Overload Conditions
        8. 8.3.16.8 Determining the Maximum Allowable AUX and USB1/2 Current
      17. 8.3.17 USB Switches
        1. 8.3.17.1 Overview
        2. 8.3.17.2 Overcurrent Conditions
        3. 8.3.17.3 FAULT1/2 Response
        4. 8.3.17.4 Undervoltage Lockout
        5. 8.3.17.5 Programming the Current-Limit Threshold Resistor RILIM
      18. 8.3.18 3.3-V LDO
      19. 8.3.19 Reset Comparator
      20. 8.3.20 Thermal Shutdown
      21. 8.3.21 Component Recommendations
        1. 8.3.21.1 Boost Inductor
        2. 8.3.21.2 IN Capacitance
        3. 8.3.21.3 AUX Capacitance
        4. 8.3.21.4 USB Capacitance
        5. 8.3.21.5 ILIM1/2 and FAULT1/2 Resistors
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Step-by-Step Design Procedure
        2. 9.2.2.2 Switching Frequency
        3. 9.2.2.3 AUX Voltage
        4. 9.2.2.4 Determine Maximum Total Current (IAUX + ILDO + IUSB1 + IUSB2 )
        5. 9.2.2.5 Power Inductor
        6. 9.2.2.6 Output AUX Capacitor Selection
        7. 9.2.2.7 Output USB1/2 Capacitor Selection
        8. 9.2.2.8 Input Capacitor Selection
          1. 9.2.2.8.1 Current-Limit Threshold Resistor RILIM
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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11 Layout

11.1 Layout Guidelines

Layout is an important design step due to the high switching frequency of the boost converter. Careful attention must be applied to the PCB layout to ensure proper function of the device and to obtain the specified performance. Potential issues resulting from poor layout techniques include wider line and load regulation tolerances, EMI noise issues, stability problems, and USB current-limit shifts. It is critical to provide a low-impedance ground path that minimizes parasitic inductance. Wide and short traces should be used in the high-current paths, and components should be placed as close to the device as possible. Grounding is an important part of the layout. The device has a PGND and a GND pin. The GND pin is the quiet analog ground of the device and should have its own separate ground pour; connect the quiet signals to GND including the RILIM1/2 resistors and any input decoupling capacitors to the GND pour. It is important that the RILIM1/2 resistors be tied to a quiet ground to avoid unwanted shifts in the current-limit threshold. The PGND pin is the high-current power-stage ground; the ground pours of the output (AUX) and bulk input capacitors should be tied to PGND. PGND and GND should to be tied together in one location at the IC thermal pad, creating a star-point ground.

The output filter of the boost converter is also critical for layout. The inductor and AUX capacitors should be placed to minimize the area of current loop through AUX–PGND–SW.The layout for the TPS2505EVM evaluation board is shown in Figure 16 and should be followed as closely as possible for best performance.

11.2 Layout Example

TPS2505 layoutexample_4lyrbrd_pas093.gif Figure 16. Layout Recommendation for TPS2505 Application – 4 Layer Board