ZHCS486A October   2011  – June 2015 TPS22933

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用范围
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Parametric Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 ON and OFF Control
      2. 8.3.2 Power Changeover
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 LDO Capacitor (for CAP Pin)
      2. 9.1.2 Using the CAP Pin as a Power Output
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 社区资源
    2. 12.2 商标
    3. 12.3 静电放电警告
    4. 12.4 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

9.1.1 LDO Capacitor (for CAP Pin)

An optional capacitor on the CAP pin helps stabilize the integrated LDO. Take care in capacitor sizing to reduce inrush currents. The voltage on the CAP pin will follow the highest input. Since the max input voltage is 12 V, the capacitor voltage rating must be higher than 12 V.

9.1.2 Using the CAP Pin as a Power Output

Figure 17 shows three power inputs multiplexed to source only through the CAP pin. In this case, the LDO outputs are not used (EN is tied low). The highest of the inputs is chosen to drive the voltage at the CAP pin.

TPS22933 boardlay2_lvsb34.gif Figure 17. Using the CAP Pin as a Multiplexer Output

9.2 Typical Application

Figure 18 shows three power inputs multiplexed to source the LDO. The LDO always on output (LOUT) is tied to an MSP430. The MSP430 then determines when to enable the switched output (VOUT) by driving the EN pin.

TPS22933 boardlay1_lvsb34.gif Figure 18. Application Example

9.2.1 Design Requirements

Table 4 lists the design parameters for TPS22933.

Table 4. Design Parameters

INPUT VOLTAGE
USB Port 5.0V
DC Input 5.0V
Battery 4.2V

9.2.2 Detailed Design Procedure

Initial power up:
DC_IN = 0 V; USB = 0 V; EN = 0 V
BAT is applied at 4.2 V
LDO power comes from BAT
LOUT = 3.6 V; CAP = 4.2 V; VOUT = 0 V

USB power is connected at 5 V, BAT remains 4.2 V and DC_IN remains 0 V
LDO power is changed from BAT to USB in tCO

LOUT = 3.6 V; CAP = 5 V; VOUT = 0 V

DC_IN power is connected at 5.0 V, BAT remains 4.2 V and USB remains 5 V
No change in LDO power

LOUT = 3.6 V; CAP = 5 V; VOUT = 0 V

EN = VIH, BAT remains 4.2 V, USB remains 5 V and DC_IN remains 5 V
LOUT = 3.6 V, CAP = 5 V; VOUT = 3.6 V

USB power is removed, BAT remains 4.2 V and DC_IN remains 5 V
LDO power is changed from USB to DC_IN

LOUT = 3.6 V; CAP = 5 V; VOUT = 3.6 V

DC_IN power is removed, BAT remains 4.2 V and USB remains 0 V:
LDO power is changed from DC_IN to BAT

LOUT = 3.6 V; CAP = 4.2 V; VOUT = 3.6 V

9.2.3 Application Curve

Figure 19 shows the device behavior in the last step of the design procedure, when DC_IN power is removed and the LDO is powered by the battery. The capacitor on the CAP pin discharges as DC_IN is removed but then charges to the battery voltage when the input is automatically switched. LOUT remains a constant 3.6 V throughout this power switching.

TPS22933 DCin_lout_lvsb34.gif Figure 19. DC_IN Removed, BAT Powers LDO (LOUT = 3.6 V)