ZHCSEQ5 August   2015 TPIC2050

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 说明 （续）
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Serial I/F Write Timing Requirements
    7. 7.7 Serial I/F Read Timing Requirements
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Protect Functions
        1. 8.3.1.1 OVP
        2. 8.3.1.2 OCP and SCP
          1. 8.3.1.2.1 OCP for Step Driver
          2. 8.3.1.2.2 SCP
        3. 8.3.1.3 Thermal Protection (TSD)
        4. 8.3.1.4 Actuator Temperature Protection (ACTTIMER)
        5. 8.3.1.5 Prevent OVP 12 V (PREOVP-12V)
      2. 8.3.2 DAC Type
      3. 8.3.3 Example of 12-Bit DAC Sampling Rate for FCS/TRK/TLT
      4. 8.3.4 Digital Input Coding
    4. 8.4 Device Functional Modes
      1. 8.4.1 Differential Tilt Mode
      2. 8.4.2 Power-On Reset (POR)
        1. 8.4.2.1 RDY (Power Ready)
    5. 8.5 Programming
      1. 8.5.1 Serial Port Functional Description
      2. 8.5.2 Write Operation
      3. 8.5.3 Read Operation
      4. 8.5.4 Write and Read Operation
    6. 8.6 Register Maps
      1. 8.6.1 Register State Transition
      2. 8.6.2 DAC Register (12-Bit Write Only)
      3. 8.6.3 Control Register (8-Bit Read/Write)
      4. 8.6.4 Detailed Description of Registers
        1. 8.6.4.1  REG01 12-Bit DAC for Tilt (offset = 01h) [reset = ]
        2. 8.6.4.2  REG02 12-Bit DAC for Focus (offset = 02h) [reset = ]
        3. 8.6.4.3  REG03 12-Bit DAC for Tracking (offset = 03h) [reset = ]
        4. 8.6.4.4  REG04 12-Bit DAC for Sled1 (offset = 04h) [reset = ]
        5. 8.6.4.5  REG05 12-Bit DAC for Sled2 (offset = 05h) [reset = ]
        6. 8.6.4.6  REG06 12-Bit DAC for Stepping1 (offset = 06h) [reset = ]
        7. 8.6.4.7  REG07 12-Bit DAC for Stepping2 (offset = 07h) [reset = ]
        8. 8.6.4.8  REG08 12-Bit DAC for Spindle (offset = 08h) [reset = ]
        9. 8.6.4.9  REG09 12-Bit DAC for Load (offset = 09h) [reset = ]
        10. 8.6.4.10 REG0A 12-Bit DAC for Laser Diode Driver (offset = 0Ah) [reset = ]
        11. 8.6.4.11 REG70 8-Bit Control Register for DriverEna (offset = 70h) [reset = ]
        12. 8.6.4.12 REG71 8-Bit Control Register for FuncEna (offset = 71h) [reset = ]
        13. 8.6.4.13 REG72 8-Bit Control Register for ACTCfg (offset = 72h) [reset = ]
        14. 8.6.4.14 REG73 8-Bit Control Register for Parm0 (offset = 73h) [reset = ]
        15. 8.6.4.15 REG74 8-Bit Control Register for SIFCfg (offset = 74h) [reset = ]
        16. 8.6.4.16 REG75 8-Bit Control Register for Parm1 (offset = 75h) [reset = ]
        17. 8.6.4.17 REG76 8-Bit Control Register for WriteEna (offset = 76h) [reset = ]
        18. 8.6.4.18 REG77 8-Bit Control Register for ClrReg (offset = 77h) [reset = ]
        19. 8.6.4.19 REG78 8-Bit Control Register for ActTemp (offset = 78h) [reset = ]
        20. 8.6.4.20 REG79 8-Bit Control Register for UVLOMon (offset = 79h) [reset = ]
        21. 8.6.4.21 REG7A 8-Bit Control Register for TSDMon (offset = 7Ah) [reset = ]
        22. 8.6.4.22 REG7B 8-Bit Control Register for OCPMon (offset = 7Bh) [reset = ]
        23. 8.6.4.23 REG7C 8-Bit Control Register for TempMon (offset = 7Ch) [reset = ]
        24. 8.6.4.24 REG7E 8-Bit Control Register for Version (offset = 7Eh) [reset = ]
        25. 8.6.4.25 REG7F 8-Bit Control Register for Status (offset = 7Fh) [reset = ]
        26. 8.6.4.26 REG61 8-Bit Control Register for SPM1 (offset = 61h) [reset = ]
        27. 8.6.4.27 REG62 8-Bit Control Register for SPM2 (offset = 62h) [reset = ]
        28. 8.6.4.28 REG6B 8-Bit Control Register for DisProt (offset = 6Bh) [reset = ]
        29. 8.6.4.29 REG6C 8-Bit Control Register for STPCfg (offset = 6Ch) [reset = ]
        30. 8.6.4.30 REG6E 8-Bit Control Register for UtilCfg (offset = 6Eh) [reset = ]
        31. 8.6.4.31 REG6F 8-Bit Control Register for MonitorSet (offset = 6Fh) [reset = ]
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1  Voltage Monitoring
      2. 9.1.2  Spindle Motor Driver Operating Sequence
      3. 9.1.3  Auto Short Brake Function
      4. 9.1.4  Spindle PWM Control
      5. 9.1.5  Spindle Driver Current Limiting Circuit
      6. 9.1.6  Sled Driver Part
      7. 9.1.7  Stepping Driver Part
      8. 9.1.8  Focus/Track/Tilt Driver Part
      9. 9.1.9  Load Driver Part
      10. 9.1.10 End Detect Function
      11. 9.1.11 Load Tray Lock Detect Function
      12. 9.1.12 Three-Beam Laser Diode Driver
      13. 9.1.13 Monitor Signal on GPOUT
      14. 9.1.14 Example Timing of Target Control System
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 社区资源
    2. 12.2 商标
    3. 12.3 静电放电警告
    4. 12.4 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Pin Configuration and Functions

DFD Package
56-Pin HTSSOP
Top View
TPIC2050 slis167_po.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
SLED1_P 1 OUT Sled1 positive output terminal
SLED1_N 2 OUT Sled1 negative output terminal
P12V_3 3 PS Power supply terminal for 12-V drivers output
SLED2_P 4 OUT Sled2 positive output terminal
SLED2_N 5 OUT Sled2 negative output terminal
PGND_2 6 PS GND terminal for 12-V drivers
C10V 7 MISC Capacitance connection terminal for internal regulator
CP1 8 MISC Capacitance connection for charge pump
CP2 9 MISC Capacitance connection for charge pump
CP3 10 MISC Capacitance connection for charge pump
GPOUT 11 OUT General-purpose output (test monitor)
XFG 12 OUT Motor speed signal output
RDY 13 OUT Device ready signal. Internally pulled up to SIOV
SSZ 14 IN SIO slave select low active input terminal
SCLK 15 IN SIO serial clock input terminal
SIMO 16 IN SIO slave input master output terminal
SOMI 17 OUT SIO slave output master input terminal
SIOV 18 PS Power-supply terminal for serial port. 3.3-V typical
XRSTIN 19 IN RESET input terminal to disable the driver IC
TEST1 20 MISC Test pin. Should be open
VLDDIN 21 IN Laser diode control analog signal input 0 to 3-V terminal. Required to set register when using VLDDIN input. Open in case of non-use analog input.
CV3P3 22 MISC Capacitance terminal for internal 3.3-V core (typical 0.1 µF)
AGND/DGND 23 PS Ground terminal for internal digital and analog
A9P5V 24 PS Power-supply terminal 9.5-V laser diode for BD
ILDD_BD 25 OUT Laser diode for BD output terminal
ILDD_DVD 26 OUT Laser diode for DVD output terminal
ILDD_CD 27 OUT Laser diode for CD output terminal
CP5V 28 MISC Capacitance connection terminal for control system power supply. Connect a ≥0.1-µF decoupling capacitor.
LOAD_P 29 OUT Load positive output terminal
LOAD_N 30 OUT Load negative output terminal
P5V12L 31 PS Power-supply terminal (5 or 12 V) for load driver output stages.
TEST2 32 MISC Test pin. Should be open
TEST3 33 MISC Test pin. Should be connected to P5V.
P5V_1 34 PS Power-supply terminal for tilt/focus/tracking drivers
TLT_N 35 OUT Tilt negative output terminal
TLT_P 36 OUT Tilt positive output terminal
TRK_P 37 OUT Tracking positive output terminal
TRK_N 38 OUT Tracking negative output terminal
FCS_P 39 OUT Focus positive output terminal
FCS_N 40 OUT Focus negative output terminal
PGND_1 41 PS GND terminal for tilt/focus/tracking channel drivers
P12V_1 42 PS Power-supply terminal for 12-V driver output stage
U 43 OUT U-phase output terminal for spindle motor
ICOM1 44 MISC Current sense resistor terminal for spindle driver
V 45 OUT V-phase output terminal for spindle motor
P12V_2 46 PS Power-supply terminal for 12-V driver output stage
W 47 OUT W-phase output terminal for spindle motor
ICOM2 48 MISC Current sense resistor terminal for spindle driver
MCOM 49 IN Motor center tap connection
ISENSE 50 IN Current sense input terminal for spindle drivers
AGND 51 PS Ground terminal for internal analog
STP1_P 52 OUT STP1 positive output terminal for collimator
STP1_N 53 OUT STP1 negative output terminal for collimator
STP2_P 54 OUT STP2 positive output terminal for collimator
STP2_N 55 OUT STP2 negative output terminal for collimator
P5V_2 56 PS Power supply terminal for 5-V driver output