ZHCSFE0B August   2016  – February 2022 TPD1E10B06-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2.     ESD Ratings - AEC Specification
    3. 6.2 ESD Ratings—IEC Specification
    4. 6.3 ESD Ratings—ISO Specification
    5. 6.4 Recommended Operating Conditions
    6. 6.5 Thermal Information
    7. 6.6 Electrical Characteristics
    8. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  AEC-Q101 Qualified
      2. 7.3.2  IEC 61000-4-2 ESD Protection
      3. 7.3.3  ISO 10605 ESD Protection
      4. 7.3.4  IEC 61000-4-5 Surge Protection
      5. 7.3.5  IO Capacitance
      6. 7.3.6  Dynamic Resistance
      7. 7.3.7  DC Breakdown Voltage
      8. 7.3.8  Ultra Low Leakage Current
      9. 7.3.9  Clamping Voltage
      10. 7.3.10 Industrial Temperature Range
      11. 7.3.11 Space-Saving Footprint
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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8.2.2 Detailed Design Procedure

To begin the design process, some parameters must be decided upon; the designer must make sure:

  • Voltage range on the protected line must not exceed the reverse standoff voltage of the TVS diode(s) (VRWM)
  • Operating frequency is supported by the I/O capacitance CIO of the TVS diode
  • IEC 61000-4-2 protection requirement is covered by the IEC performance of the TVS diode

For this application, the audio signal voltage range is –3 V to 3 V. The VRWM for the TVS is –5.5 V to 5.5 V; therefore, the bidirectional TVS does not break down during normal operation, and therefore normal operation of the audio signal is not effected because of the signal voltage range. In this application, a bidirectional TVS like TPD1E10B06-Q1 is required.

Next, consider the frequency content of this audio signal. In this application with the class AB amplifier, the frequency content is from 20 Hz to 20 kHz; ensure that the TVS I/O capacitance does not distort this signal by filtering it. With the TPD1E10B06-Q1 typical capacitance of 12 pF, which leads to a typical 3-dB bandwidth of 400 MHz, this diode has sufficient bandwidth to pass the audio signal without distorting it.

Finally, the human interface in this application requires above standard Level 4 IEC 61000-4-2 system-level ESD protection (±20-kV Contact, ±25-kV Air-Gap). A standard TVS cannot survive this level of IEC ESD stress. However, the TPD1E10B06-Q1 can survive at least ±30-kV Contact/ ±30-kV Air-Gap. Therefore, the device can provide sufficient ESD protection for the interface, even though the requirements are stringent. For any TVS diode to provide the full range of ESD protection capabilities, as well as to minimize the noise and EMI disturbances the board will see during ESD events, a system designer must use proper board layout of their TVS ESD protection diodes. See Section 10 for instructions on properly laying out TPD1E10B06-Q1.