SPNS253A May 2018 – September 2019 TMS570LC4357-EP
PRODUCTION DATA.
The entire L2 SRAM can be globally initialized by setting the corresponding bit in SYS.MSINENA register. When initialized, the memory arrays are written with all zeros for the 64-bit data and the corresponding 8-bit ECC checksum. Hardware memory initialization eliminates ECC error when the CPU reads from an un-initialized memory location which can cause an ECC error. For more information, see the device-specific Technical Reference Manual.