ZHCSCV4C October   2014  – April 2021 TMP451-Q1

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics for Figure 1-1
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Temperature Measurement Data
        1. 7.3.1.1 Standard Binary to Decimal Temperature Data Calculation Example
        2. 7.3.1.2 Standard Decimal to Binary Temperature Data Calculation Example
      2. 7.3.2 Series Resistance Cancellation
      3. 7.3.3 Differential Input Capacitance
      4. 7.3.4 Filtering
      5. 7.3.5 Sensor Fault
      6. 7.3.6 ALERT and THERM Functions
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode (SD)
    5. 7.5 Programming
      1. 7.5.1 Serial Interface
        1. 7.5.1.1 Bus Overview
        2. 7.5.1.2 Bus Definitions
        3. 7.5.1.3 Serial Bus Address
        4. 7.5.1.4 Read and Write Operations
        5. 7.5.1.5 Timeout Function
        6. 7.5.1.6 High-Speed Mode
    6. 7.6 Register Map
      1. 7.6.1 Register Information
        1. 7.6.1.1  Pointer Register
        2. 7.6.1.2  Temperature Registers
        3. 7.6.1.3  Status Register
        4. 7.6.1.4  Configuration Register
        5. 7.6.1.5  Conversion Rate Register
        6. 7.6.1.6  One-Shot Start Register
        7. 7.6.1.7  η-Factor Correction Register
        8. 7.6.1.8  Offset Register
        9. 7.6.1.9  General Call Reset
        10. 7.6.1.10 Identification Register
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 接收文档更新通知
    2. 11.2 支持资源
    3. 11.3 Trademarks
    4. 11.4 静电放电警告
    5. 11.5 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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Layout Guidelines

Remote temperature sensing on the TMP451-Q1 device measures very small voltages using very low currents; therefore, noise at the device inputs must be minimized. Most applications using the TMP451-Q1 have high digital content, with several clocks and logic level transitions creating a noisy environment. Layout should adhere to the following guidelines:

  1. Place the TMP451-Q1 device as close to the remote junction sensor as possible.
  2. Route the D+ and D– traces next to each other and shield them from adjacent signals through the use of ground guard traces; see Figure 10-1. If a multilayer PCB is used, bury these traces between ground or V+ planes to shield them from extrinsic noise sources. 5 mil (0.127 mm) PCB traces are recommended.
  3. Minimize additional thermocouple junctions caused by copper-to-solder connections. If these junctions are used, make the same number and approximate locations of copper-to-solder connections in both the D+ and D– connections to cancel any thermocouple effects.
  4. Use a 0.1μF local bypass capacitor directly between the V+ and GND of the TMP451-Q1 device. For optimum measurement performance, minimize filter capacitance between D+ and D– to 1000 pF or less . This capacitance includes any cable capacitance between the remote temperature sensor and the TMP451-Q1 device.
  5. If the connection between the remote temperature sensor and the TMP451-Q1 device is less than 8-in (20,32 cm) long, use a twisted-wire pair connection. For lengths greater than 8 in, use a twisted, shielded pair with the shield grounded as close to the TMP451-Q1 device as possible. Leave the remote sensor connection end of the shield wire open to avoid ground loops and 60-Hz pickup.
  6. Thoroughly clean and remove all flux residue in and around the pins of the TMP451-Q1 device to avoid temperature offset readings as a result of leakage paths between D+ and GND, or between D+ and V+.
GUID-A99BCFEC-F0F1-48AD-B153-2F7EBB35B5F6-low.gif
Use minimum 5-mil (0.127 mm) traces with 5-mil spacing.
Figure 10-1 Suggested PCB Layer Cross-Section