SBVS404A April   2020  – June 2020 TLV4062 , TLV4082

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Block Diagram for TLV4062
      2.      Block Diagram for TLV4082
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Inputs (IN1, IN2)
      2. 7.4.2 Outputs (OUT1, OUT2)
      3. 7.4.3 Switching Threshold and Hysteresis
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Threshold Overdrive
    2. 8.2 Typical Applications
      1. 8.2.1 Monitoring Two Separate Rails
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Early Warning Detection
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
      3. 8.2.3 Additional Application Information
        1. 8.2.3.1 Pull-Up Resistor Selection
        2. 8.2.3.2 INx Capacitor
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Related Links
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary

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8.2.1.2 Detailed Design Procedure

Configure the circuit as shown in Figure 23. Connect V+ to a power supply that is compatible with the input logic level of the device connected to the output, and connect V- to ground. Resistors R1 and R2 create the over-voltage alert level at 6.5 V and resistors R3 and R4 create the over-voltage alert level at 4 V. When the VMON rises, the resistor divider voltage crosses VIT+. This causes the comparator output to transition from a logic low level (normal operation), to a logic high level. When VMON falls back down and the resistor divider voltage crosses VIT- and signal that the system is approaching normal operating voltage levels once again. Make sure to set VMON at a value below the absolute maximum voltage of the system in question.

Equation 2. TLV4062 TLV4082 eq3.gif

where

  • R1/R3 and R2/R4 are the resistor values for the resistor divider connected to INx
  • VMON is the voltage source that is being monitored for an over-voltage condition
  • VIT+ is the rising edge threshold where the comparator output changes state from low to high

Rearranging Equation 2 and solving for R1 yields Equation 3. Set R2/R4 to a fixed value.

Equation 3. TLV4062 TLV4082 eq2.gif

Using the nearest 1% resistors and the equation above, R1 = 300 kΩ, R2 =1.33 MΩ, R3 = 953 kΩ, and R4 = 407 kΩ. To get the trip point as close as possible to rising threshold, VIT+, VMON are adjusted so that VMON1 = 6.49 V and VMON2 = 3.99 V. Using equation Equation 4 will determine when the output will fall low (crossing VIT-). The over-voltage signal will go low when VMON1 = 6.16 V and VMON2 = 3.79 V.

Equation 4. TLV4062 TLV4082 eq1.gif

where

  • VMON is the voltage at which the resistor divider crosses the falling threshold, VIT-

Choose RTOTAL (equal to R1 + R2 & R3 + R4) so that the current through the divider is approximately 100 times higher than the input current at the INx pins. The resistors can have high values to minimize current consumption as a result of low input bias current without adding significant error to the resistive divider. For details on sizing input resistors, see the Optimizing Resistor Dividers at a Comparator Input application report (SLVA450), available for download from www.ti.com.