ZHCS986B May   2012  – December 2018 TLV320DAC3203

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 描述
    1.     Device Images
      1.      简化方框图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics, Bypass Outputs
    6. 6.6  Electrical Characteristics, Microphone Interface
    7. 6.7  Electrical Characteristics, Audio Outputs
    8. 6.8  Electrical Characteristics, LDO
    9. 6.9  Electrical Characteristics, Misc.
    10. 6.10 Electrical Characteristics, Logic Levels
    11. 6.11 Typical Timing Characteristics — Audio Data Serial Interface Timing (I2S)
    12. 6.12 Typical DSP Timing Characteristics
    13. 6.13 I2C Interface Timing
    14. 6.14 SPI Interface Timing (See )
    15. 6.15 Typical Characteristics
      1. 6.15.1 Typical Characteristics, FFT
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Device Connections
        1. 7.3.1.1 Digital Pins
          1. 7.3.1.1.1 Multifunction Pins
        2. 7.3.1.2 Analog Pins
      2. 7.3.2 Analog Audio I/O
        1. 7.3.2.1 Analog Low Power Bypass
        2. 7.3.2.2 Headphone Outputs
      3. 7.3.3 Digital Microphone Inteface
        1. 7.3.3.1 ADC Processing Blocks — Overview
          1. 7.3.3.1.1 Processing Blocks
      4. 7.3.4 DAC
        1. 7.3.4.1 DAC Processing Blocks — Overview
      5. 7.3.5 Powertune
      6. 7.3.6 Digital Audio I/O Interface
      7. 7.3.7 Clock Generation and PLL
      8. 7.3.8 Control Interfaces
        1. 7.3.8.1 I2C Control
        2. 7.3.8.2 SPI Control
    4. 7.4 Device Functional Modes
    5. 7.5 Register Maps
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.5 Register Maps

Table 4. Summary of Register Map

Decimal Hex DESCRIPTION
PAGE NO. REG. NO. PAGE NO. REG. NO.
0 0 0x00 0x00 Page Select Register
0 1 0x00 0x01 Software Reset Register
0 2 0x00 0x02 Reserved Register
0 3 0x00 0x03 Reserved Register
0 4 0x00 0x04 Clock Setting Register 1, Multiplexers
0 5 0x00 0x05 Clock Setting Register 2, PLL P&R Values
0 6 0x00 0x06 Clock Setting Register 3, PLL J Values
0 7 0x00 0x07 Clock Setting Register 4, PLL D Values (MSB)
0 8 0x00 0x08 Clock Setting Register 5, PLL D Values (LSB)
0 9-10 0x00 0x09-0x0A Reserved Register
0 11 0x00 0x0B Clock Setting Register 6, NDAC Values
0 12 0x00 0x0C Clock Setting Register 7, MDAC Values
0 13 0x00 0x0D DAC OSR Setting Register 1, MSB Value
0 14 0x00 0x0E DAC OSR Setting Register 2, LSB Value
0 15-17 0x00 0x0F-0x11 Reserved Register
0 18 0x00 0x12 Clock Setting Register 8, NADC Values
0 19 0x00 0x13 Clock Setting Register 9, MADC Values
0 20-24 0x00 0x14-0x18 Reserved Register
0 25 0x00 0x19 Clock Setting Register 10, Multiplexers
0 26 0x00 0x1A Clock Setting Register 11, CLKOUT M divider value
0 27 0x00 0x1B Audio Interface Setting Register 1
0 28 0x00 0x1C Audio Interface Setting Register 2, Data offset setting
0 29 0x00 0x1D Audio Interface Setting Register 3
0 30 0x00 0x1E Clock Setting Register 12, BCLK N Divider
0 31 0x00 0x1F Audio Interface Setting Register 4, Secondary Audio Interface
0 32 0x00 0x20 Audio Interface Setting Register 5
0 33 0x00 0x21 Audio Interface Setting Register 6
0 34 0x00 0x22 Digital Interface Misc. Setting Register
0 35-36 0x00 0x23-0x24 Reserved Register
0 37 0x00 0x25 DAC Flag Register 1
0 38 0x00 0x26 DAC Flag Register 2
0 39-41 0x00 0x27-0x29 Reserved Register
0 42 0x00 0x2A Sticky Flag Register 1
0 43 0x00 0x2B Interrupt Flag Register 1
0 44 0x00 0x2C Sticky Flag Register 2
0 45 0x00 0x2D Sticky Flag Register 3
0 46 0x00 0x2E Interrupt Flag Register 2
0 47 0x00 0x2F Interrupt Flag Register 3
0 48 0x00 0x30 INT1 Interrupt Control Register
0 49 0x00 0x31 INT2 Interrupt Control Register
0 50-51 0x00 0x32-0x33 Reserved Register
0 52 0x00 0x34 GPIO/MFP5 Control Register (YZK Package only)
0 53 0x00 0x35 MFP2 Function Control Register
0 54 0x00 0x36 DIN/MFP1 Function Control Register
0 55 0x00 0x37 MISO/MFP4 Function Control Register
0 56 0x00 0x38 SCLK/MFP3 Function Control Register
0 57-59 0x00 0x39-0x3B Reserved Registers
0 60 0x00 0x3C DAC Signal Processing Block Control Register
0 61-62 0x00 0x3D-0x3E Reserved Register
0 63 0x00 0x3F DAC Channel Setup Register 1
0 64 0x00 0x40 DAC Channel Setup Register 2
0 65 0x00 0x41 Left DAC Channel Digital Volume Control Register
0 66 0x00 0x42 Right DAC Channel Digital Volume Control Register
0 67 0x00 0x43 Headset Detection Configuration Register
0 68 0x00 0x44 DRC Control Register 1
0 69 0x00 0x45 DRC Control Register 2
0 70 0x00 0x46 DRC Control Register 3
0 71 0x00 0x47 Beep Generator Register 1
0 72 0x00 0x48 Beep Generator Register 2
0 73 0x00 0x49 Beep Generator Register 3
0 74 0x00 0x4A Beep Generator Register 4
0 75 0x00 0x4B Beep Generator Register 5
0 76 0x00 0x4C Beep Generator Register 6
0 77 0x00 0x4D Beep Generator Register 7
0 78 0x00 0x4E Beep Generator Register 8
0 79 0x00 0x4F Beep Generator Register 9
0 80-127 0x00 0x50-0x7F Reserved Register
1 0 0x01 0x00 Page Select Register
1 1 0x01 0x01 Power Configuration Register
1 2 0x01 0x02 LDO Control Register
1 3 0x01 0x03 Playback Configuration Register 1
1 4 0x01 0x04 Playback Configuration Register 2
1 5-8 0x01 0x05-0x08 Reserved Register
1 9 0x01 0x09 Output Driver Power Control Register
1 10 0x01 0x0A Common Mode Control Register
1 11 0x01 0x0B Over Current Protection Configuration Register
1 12 0x01 0x0C HPL Routing Selection Register
1 13 0x01 0x0D HPR Routing Selection Register
1 14-15 0x01 0x0E-0x0F Reserved Register
1 16 0x01 0x10 HPL Driver Gain Setting Register
1 17 0x01 0x11 HPR Driver Gain Setting Register
1 18-19 0x01 0x12-0x13 Reserved Register
1 20 0x01 0x14 Headphone Driver Startup Control Register
1 21 0x01 0x15 Reserved Register
1 22 0x01 0x16 INL to HPL Volume Control Register
1 23 0x01 0x17 INR to HPR Volume Control Register
1 24-50 0x01 0x18-0x32 Reserved Register
1 51 0x01 0x33 MICBIAS Configuration Register
1 52-57 0x01 0x34-0x39 Reserved Register
1 58 0x01 0x3A Analog Input Settings
1 59-62 0x01 0x3B-0x3E Reserved Register
1 63 0x01 0x3F DAC Analog Gain Control Flag Register
1 64-122 0x01 0x40-0x7A Reserved Register
1 123 0x01 0x7B Reference Power-up Configuration Register
1 124 0x01 0x7C Reserved Register
1 125 0x01 0x7D Offset Callibration Register
1 126-127 0x01 0x7E-0x7F Reserved Register
8 0-127 0x08 0x00-0x7F Reserved Register
9-16 0-127 0x09-0x10 0x00-0x7F Reserved Register
26-34 0-127 0x1A-0x22 0x00-0x7F Reserved Register
44 0 0x2C 0x00 Page Select Register
44 1 0x2C 0x01 DAC Adaptive Filter Configuration Register
44 2-7 0x2C 0x02-0x07 Reserved
44 8-127 0x2C 0x08-0x7F DAC Coefficients Buffer-A C(0:29)
45-52 0 0x2D-0x34 0x00 Page Select Register
45-52 1-7 0x2D-0x34 0x01-0x07 Reserved.
45-52 8-127 0x2D-0x34 0x08-0x7F DAC Coefficients Buffer-A C(30:255)
62-70 0 0x3E-0x46 0x00 Page Select Register
62-70 1-7 0x3E-0x46 0x01-0x07 Reserved.
62-70 8-127 0x3E-0x46 0x08-0x7F DAC Coefficients Buffer-B C(0:255)
80-114 0-127 0x50-0x72 0x00-0x7F Reserved Register
152-186 0-127 0x98-0xBA 0x00-0x7F Reserved Register