ZHCS986B May   2012  – December 2018 TLV320DAC3203

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 描述
    1.     Device Images
      1.      简化方框图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics, Bypass Outputs
    6. 6.6  Electrical Characteristics, Microphone Interface
    7. 6.7  Electrical Characteristics, Audio Outputs
    8. 6.8  Electrical Characteristics, LDO
    9. 6.9  Electrical Characteristics, Misc.
    10. 6.10 Electrical Characteristics, Logic Levels
    11. 6.11 Typical Timing Characteristics — Audio Data Serial Interface Timing (I2S)
    12. 6.12 Typical DSP Timing Characteristics
    13. 6.13 I2C Interface Timing
    14. 6.14 SPI Interface Timing (See )
    15. 6.15 Typical Characteristics
      1. 6.15.1 Typical Characteristics, FFT
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Device Connections
        1. 7.3.1.1 Digital Pins
          1. 7.3.1.1.1 Multifunction Pins
        2. 7.3.1.2 Analog Pins
      2. 7.3.2 Analog Audio I/O
        1. 7.3.2.1 Analog Low Power Bypass
        2. 7.3.2.2 Headphone Outputs
      3. 7.3.3 Digital Microphone Inteface
        1. 7.3.3.1 ADC Processing Blocks — Overview
          1. 7.3.3.1.1 Processing Blocks
      4. 7.3.4 DAC
        1. 7.3.4.1 DAC Processing Blocks — Overview
      5. 7.3.5 Powertune
      6. 7.3.6 Digital Audio I/O Interface
      7. 7.3.7 Clock Generation and PLL
      8. 7.3.8 Control Interfaces
        1. 7.3.8.1 I2C Control
        2. 7.3.8.2 SPI Control
    4. 7.4 Device Functional Modes
    5. 7.5 Register Maps
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.6 Electrical Characteristics, Microphone Interface

At 25°C, AVdd, DVdd, IOVDD = 1.8V, LDO_in = 1.8V, AVdd LDO disabled, Cref = 10μF on REF PIN, PLL disabled unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
MICROPHONE BIAS
Bias voltage CM = 0.9V,
LDOin = 3.3V,
no load		 Micbias Mode 0, Connect to AVdd or LDOin 1.25 V
Micbias Mode 1, Connect to LDOin 1.7 V
Micbias Mode 2, Connect to LDOin 2.5 V
Micbias Mode 3, Connect to AVdd AVdd V
Micbias Mode 3, Connect to LDOin LDOin V
CM = 0.75V,
LDOin = 3.3V		 Micbias Mode 0, Connect to AVdd or LDOin 1.04 V
Micbias Mode 1, Connect to AVdd or LDOin 1.42 V
Micbias Mode 2, Connect to LDOin 2.08 V
Micbias Mode 3, Connect to AVdd AVdd V
Micbias Mode 3, Connect to LDOin LDOin V
Output Noise CM = 0.9V Micbias Mode 2, A-weighted, 20Hz to 20kHz bandwidth, Current load = 0mA 10 μVRMS
Current Sourcing Micbias Mode 2, Connect to LDOin 3 mA
Inline Resistance Micbias Mode 3, Connect to AVdd 160 Ω
Micbias Mode 3, Connect to LDOin 110