SLVS515D December   2004  – November 2015 TLC5940

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Test Parameter Equations
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Serial Interface
      2. 8.3.2 Error Information Output
      3. 8.3.3 TEF: Thermal Error Flag
      4. 8.3.4 LOD: LED Open Detection
      5. 8.3.5 Delay Between Outputs
      6. 8.3.6 Output Enable
      7. 8.3.7 Setting Maximum Channel Current
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operating Modes
      2. 8.4.2 Setting DOT Correction
      3. 8.4.3 Setting Grayscale
      4. 8.4.4 Status Information Output
      5. 8.4.5 Grayscale PWM Operation
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Serial Data Transfer Rate
        2. 9.2.2.2 Grayscale (GS) Data
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Power Dissipation Calculation
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
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订购信息

5 Pin Configuration and Functions

PWP Package
28-Pin HTSSOP
Top View
TLC5940 PWP-package-pinout.gif
NT Package
28-Pin PDIP
Top View
TLC5940 NT-package-pinout.gif
RHB Package
32-Pin VQFN
Top View
TLC5940 RHB-package-pinout.gif
NC – No internal connection

Pin Functions

PIN TYPE DESCRIPTION
NAME DIP NO. PWP NO. RHB NO.
BLANK 23 2 31 I Blank all outputs. When BLANK = H, all OUTn outputs are forced OFF. GS counter is also reset. When BLANK = L, OUTn are controlled by grayscale PWM control.
DCPRG 19 26 25 I Switch DC data input. When DCPRG = L, DC is connected to EEPROM. When DCPRG = H, DC is connected to the DC register.
DCPRG also controls EEPROM writing, when VPRG = V(PRG). EEPROM data = 3 Fh (default)
GND 22 1 30 G Ground
GSCLK 18 25 24 I Reference clock for grayscale PWM control
IREF 20 27 26 I Reference current terminal
NC 12 No connection
13
28
29
OUT0 28 7 4 O Constant current output
OUT1 1 8 5 O Constant current output
OUT2 2 9 6 O Constant current output
OUT3 3 10 7 O Constant current output
OUT4 4 11 8 O Constant current output
OUT5 5 12 9 O Constant current output
OUT6 6 13 10 O Constant current output
OUT7 7 14 11 O Constant current output
OUT8 8 15 14 O Constant current output
OUT9 9 16 15 O Constant current output
OUT10 10 17 16 O Constant current output
OUT11 11 18 17 O Constant current output
OUT12 12 19 18 O Constant current output
OUT13 13 20 19 O Constant current output
OUT14 14 21 20 O Constant current output
OUT15 15 22 21 O Constant current output
SCLK 25 4 1 I Serial data shift clock
SIN 26 5 2 I Serial data input
SOUT 17 24 23 O Serial data output
VCC 21 28 27 I Power supply voltage
VPRG 27 6 3 I Multifunction input pin. When VPRG = GND, the device is in GS mode. When VPRG = VCC, the device is in DC mode. When VPRG = V(VPRG), DC register data can programmed into DC EEPROM with DCPRG=HIGH. EEPROM data = 3 Fh (default)
XERR 16 23 22 O Error output. XERR is an open-drain terminal. XERR goes L when LOD or TEF is detected.
XLAT 24 3 32 I Level triggered latch signal. When XLAT = high, the TLC5940 writes data from the input shift register to either GS register (VPRG = low) or DC register (VPRG = high). When XLAT = low, the data in GS or DC register is held constant.