SGLS156F March   2003  – December 2016 TLC3702-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 LinCMOS™ Process
      2. 8.3.2 Electrostatic Discharge
      3. 8.3.3 Input Protection Circuit Operation
      4. 8.3.4 Positive ESD Transients
      5. 8.3.5 Negative ESD Transients
      6. 8.3.6 Circuit-Design Considerations
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Achieving Greater Noise Immunity
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Two-Phase Non-Overlapping Clock Generator
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • D|8
  • PW|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

Layout

Layout Guidelines

For any high-speed comparator or amplifier, proper design and printed-circuit board (PCB) layout are necessary for optimal performance. Excess stray capacitance on the active input, or improper grounding, can limit the maximum performance of high-speed circuitry.

  • Minimizing resistance from the signal source to the comparator input is necessary in order to minimize the propagation delay of the complete circuit. The source resistance along with input and stray capacitance creates an RC filter that delays voltage transitions at the input, and reduces the amplitude of high-frequency signals. The input capacitance of the TLC3702-Q1 device along with stray capacitance from an input pin to ground results in several picofarads of capacitance.
  • The location and type of capacitors used for power-supply bypassing are critical to high-speed comparators. The suggested 2.2-µF tantalum capacitor do not need to be as close to the device as the 0.1-µF capacitor, and may be shared with other devices. The 2.2-µF capacitor buffers the power-supply line against ripple, and the 0.1-µF capacitor provides a charge for the comparator during high frequency switching.
  • In a high-speed circuit, fast rising and falling switching transients create voltage differences across lines that would be at the same potential at DC. To reduce this effect, a ground plane is often used to reduce difference in voltage potential within the circuit board. A ground plane has the advantage of minimizing the effect of stray capacitances on the circuit board by providing a more desirable path for the current to flow. With a signal trace over a ground plane, at high-frequency the return current (in the ground plane) tends to flow right under the signal trace. Breaks in the ground plane (as simple as through-hole leads and vias) increase the inductance of the plane, making it less effective at higher frequencies. Breaks in the ground plane for necessary vias should be spaced randomly.
  • Figure 29 shows an evaluation layout for the TLC3702-Q1 SOIC-8 package. C1 and C2 are power-supply bypass capacitors. Place the 0.1-µF capacitor closest to the comparator. Figure 25 shows a schematic of this circuit.

Layout Example

TLC3702-Q1 TLC3702_Layout.gif Figure 29. Layout Example