ZHCSK86 September   2019 THVD1505

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      支持极性纠正 (POLCOR) 的典型网络应用
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings [IEC]
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Power Dissipation Characteristics
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Driver
    2. 7.2 Receiver
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bus Polarity Correction
        1. 8.3.1.1 Passive Polarity Definition Using Fail-Safe Biasing Network
        2. 8.3.1.2 Active Polarity Definition by the Master Node
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Device Configuration
      2. 9.1.2 Bus Design
      3. 9.1.3 Fail-Safe Biasing for Passive Polarity Definition
      4. 9.1.4 Cable Length Versus Data Rate
      5. 9.1.5 Stub Length
      6. 9.1.6 Transient Protection
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Design and Layout Considerations For Transient Protection
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 器件支持
      1. 12.1.1 第三方产品免责声明
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.4 Device Functional Modes

Table 1. Driver Pin Functions

INPUT ENABLE OUTPUTS DESCRIPTION
D DE A B
NORMAL MODE
H H H L Actively drives bus high
L H L H Actively drives bus low
X L Z Z Driver disabled
X OPEN Z Z Driver disabled by default
OPEN H H L Actively drives bus high
POLARITY-CORRECTING MODE
H H L H Actively drives bus low
L H H L Actively drives bus high
X L Z Z Driver disabled
X OPEN Z Z Driver disabled by default
OPEN H L H Actively drives bus low

Table 2. Receiver Pin Functions

DIFFERENTIAL INPUT ENABLE OUTPUT DESCRIPTION
VID = VA – VB RE DE R
VID > VIT+ L X H Receive valid bus high
VIT- > VID L X L during tFS
H after tFS 		Receive valid bus low if lasting for less than tFS, polarity correcting if lasting for more than tFS
X H X Z Receiver disabled
X OPEN X Z Receiver disabled
Open, short or VIT+ > VID > VIT- L X H after tFS Receiver fail-safe high