SLOS776A September   2012  – December 2015 THS789

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Host Serial Interface DC Characteristics
    7. 6.7 Host Serial Interface AC Characteristics
    8. 6.8 Power Consumption
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Counter, Latches, Clock Multiplier
      2. 7.3.2 Channels, Interpolator
      3. 7.3.3 FIFO
      4. 7.3.4 Calibration, ALU, Tag, Shifter
      5. 7.3.5 Serial Interface, Temperature, Overhead
    4. 7.4 Device Functional Modes
      1. 7.4.1 Serial-Results Interface
      2. 7.4.2 Resister Map Descriptions for All Channels and Central Register
    5. 7.5 Programming
      1. 7.5.1 Host Processor Bus Interface
        1. 7.5.1.1  Serial Interface
        2. 7.5.1.2  Read vs Write Cycle
        3. 7.5.1.3  Parallel (Broadcast) Write
        4. 7.5.1.4  Address
        5. 7.5.1.5  Data
        6. 7.5.1.6  Reset
        7. 7.5.1.7  Chip ID
        8. 7.5.1.8  Read Operations
        9. 7.5.1.9  Write Operations
        10. 7.5.1.10 Write Operations to Multiple Destinations
      2. 7.5.2 Serial-Results Interface and ALU
        1. 7.5.2.1 Event Latches
        2. 7.5.2.2 FIFO
        3. 7.5.2.3 Result-Interface Operation
        4. 7.5.2.4 Serial Results Latency
        5. 7.5.2.5 TMU Calibration
        6. 7.5.2.6 Temperature Sensor
    6. 7.6 Register Maps
      1. 7.6.1 Register Address Space
      2. 7.6.2 Register Map Detail
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedures
        1. 8.2.2.1 Time Measurement
        2. 8.2.2.2 Output Clock to Data/Strobe Phasing
        3. 8.2.2.3 Master Clock Input and Clock Multiplier
        4. 8.2.2.4 Temperature Measurement and Alarm Circuit
        5. 8.2.2.5 LVDS-Compatible I/Os
        6. 8.2.2.6 LVDS-Compatible Inputs
        7. 8.2.2.7 LVDS-Compatible Outputs
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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6 Specifications

6.1 Absolute Maximum Ratings

over operating junction temperature range (unless otherwise noted)
MIN MAX UNIT
VCC 4 V
Analog I/O to GND(2) –0.3 VCC + 0.3 V
Digital I/O to GND –0.3 VCC + 0.3 V
TJ Maximum junction temperature(1) 150 °C
Tstg Storage temperature 150 °C
(1) The THS789 device has an automatic power shutdown at 140°C, typical.
(2) LVDS outputs are not short-circuit-proof to GND.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±250
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating junction temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VCC Supply voltage 3.135 3.465 V
TJ Junction temperature 0 105 °C
MCLOCK frequency 200 MHz

6.4 Thermal Information

THERMAL METRIC(1) THS789 UNIT
PFD (HTQFP)
100 PINS
RθJA Junction-to-ambient thermal resistance 24.2 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 10.4 °C/W
RθJB Junction-to-board thermal resistance 9.8 °C/W
ψJT Junction-to-top characterization parameter 0.3 °C/W
ψJB Junction-to-board characterization parameter 9.7 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 0.5 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Typical conditions are at TJ = 55°C and VCC = 3.3 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TDC CHARACTERISTICS
Time-measurement precision (LSB) 13.02 ps
Measurement accuracy after calibration, mean –800 800 ps
Single-event accuracy, one sigma 800 ps
Time-measurement temperature coefficient 0.1 ps/°C
Time-measurement voltage coefficient ±30 ps/V
Event input rate 200 MHz
Minimum event pulse duration 250 ps
Turnon time (ready to take timestamp) 250 μs
MASTER CLOCK CHARACTERISTICS
Frequency 200 MHz
Duty cycle 0.4 0.6
Jitter 3 ps RMS
HIGH-SPEED LVDS INPUTS: MCLK, EVENT, SYNC
Differential input voltage 100-Ω termination, line-to-line 200 350 500 mV
Common-mode voltage 1.25 V
Peak voltage, either input 0.6 1.7 V
Input capacitance 1 pF
HIGH-SPEED LVDS OUTPUTS: Rdata, Rstrobe, RCLK
Differential output voltage 100-Ω termination, line-to-line 250 325 400 mV
Common-mode voltage 1.125 1.28 1.375 V
Rise time/fall time 20%/80% 250 ps
Output resistance 40 Ω
TEMPERATURE SENSOR DC CHARACTERISTICS
Output voltage TJ = 65°C 1.69 V
Output voltage temperature slope 5 mV/°C
Max capacitive load 30 pF
Max resistive load 10 kΩ
OVERTEMPERATURE ALARM DC CHARACTERISTICS
Trip point Active-low pulldown 141 °C
Leakage current Temperature < trip point 1 μA
Output voltage, low Isink = 1 ma 0.2 V
OUTPUT INTERFACE TIMING
RCLK duty cycle 45% 50% 55%
Rdata/Rstrobe to RCLK setup time 300 MHz 1.4 ns
Rdata/Rstrobe to RCLK hold time 300 MHz 1.5 ns
OPERATING PARAMETERS
Coarse counter range 34 bit
Coarse counter max time range 14.31 s
Result-interface clock 300 MHz
Result-interface transfer format 40 bit
Result-interface time range –7.158 7.158 s

6.6 Host Serial Interface DC Characteristics

over operating junction temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIH High-level input voltage 0.7 × VCC VCC + 0.5 V
VIL Low-level input voltage GND – 0.3 0.3 × VCC V
VOH High-level output voltage VCC – 0.5 VCC + 0.3 V
VOL Low-level output voltage 0 0.4 V
Ilkg Leakage current 1 µA

6.7 Host Serial Interface AC Characteristics

over operating junction temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
HCLK frequency 50 MHz
Rise and fall times 3.5 ns
HCLK duty cycle 40% 50% 60%
Hstrobe high period between two consecutive transactions 40 ns
Hstrobe low to HCLK high setup 5 ns
HCLK high to Hstrobe high hold time 5 ns
Hdata in to HCLK high setup 5 ns
Hdata in to HCLK high hold time 5 ns
HCLK falling edge to Hdata out (L or H) CL = 20 pF 3.25 ns
HCLK falling edge to Hdata out (H or L) CL = 20 pF 3.25 ns

6.8 Power Consumption

Typical conditions are at 55°C junction temperature, VCC = 3.3 V.
CONDITION TYP MAX UNIT
Four channel current 925 1236 mA

6.9 Typical Characteristics

THS789 sigma_vs_window_los616.gif Figure 1. Typical Per Channel Sigmas vs 5-ns (200-MHz) Window